FPGA Prototyping Framework on ARROW SoCKit Board with Xillybus Interface and Standard FIFO

Field Programmable Gate Array (FPGA) has been a popular candidate in hardware acceleration for offloading compute-intensive tasks from the traditional microprocessors. Due to the parallel nature, algorithm functions implemented on FPGAs can provide acceleration and are more energy efficient than the software based counterparts on traditional processors. With the reconfigurability, design changes on FPGA do not induce additional Non-recurring engineering cost (NRE) in re-tooling or in device re-spins as in the case of application-specific integrated circuit (ASIC) designs. Furthermore, a system-on-chip (SoC) architecture that integrates traditional processors with FPGA fabrics enables a hybrid reconfigurable architecture that the FPGA may be re-purposed as needed on the fly. These advantages in FPGA applications inspire this thesis in presenting a prototyping framework for FPGA system development and testing on an Arrow SoCKit evaluation board. The framework utilizes the Xillybus data transport interface to handle data communications between the on-board ARM processor and the FPGA. This thesis further presents the data communications interface requirements as well as a transmission time analysis for data transfer between the host processor software application and the FPGA module. Analyzing the transmission time for 10 kilobytes of data, it shows the transmission time latency is stable in the sense that it varies within 6 microseconds. In addition, analyzing the transmission time for 20 bytes data shows that manually flushing the buffer is advantageous for sending small sized data packets on asynchronous streams.

Name thesis:degree_name

Master of Science

Level thesis:degree_level

Masters

Discipline thesis:degree_discipline

Computer and Systems Engineering

Grantor

University of Houston

Year dc:date.issued

2017

Author dc:creator

• Lin, Jih-Tsen

Advisor dc:contributor.advisor

• Chen, Yuhua

Committee members dc:contributor.committeemember

• Wolfe, John C.
• Vipulanandan, Cumaraswamy

• FPGA
• FPGA system prototyping framework

Statement dc:rights

• The author of this work is the copyright owner. UH Libraries and the Texas Digital Library have their permission to store and provide access to this work. Further transmission, reproduction, or presentation of this work is prohibited except with permission of the author(s).

Language dc:language.iso

eng

Handle dc:identifier.uri

http://hdl.handle.net/10657/2907

OAI identifier oai:identifier

oai:uh-ir.tdl.org:10657/2907