Hardware Implementation of the FAEST PQC Digital Signature Scheme

Quantum computers are becoming increasingly powerful every day, and with each new milestone, we are closer to a quantum computer capable of solving the mathematical problems that form the basis of classical asymmetric cryptography. To prepare for this, experts are developing new cryptographic schemes known as Post-Quantum Cryptography (PQC), which can be implemented with classical computers and are expected to be secure against classical and quantum computers. This thesis provides an overview of the current state of PQC, which is in a transition period. The first standards for key encapsulation mechanisms (KEMs) and digital signatures have been selected but are still being finalized, while an additional call to find different candidates for PQC digital signatures has recently been published. This situation presents a challenge for the cryptographic community because efforts must be divided between finalizing decisions on existing standards and starting the evaluation of new candidates. The contributions of this thesis include a detailed examination of FAEST, a promising symmetric-based candidate from the additional round of PQC digital signatures. This thesis also provides valuable new data on FAEST’s performance when implemented in hardware, allowing for a more comprehensive analysis and comparison with other candidates.

Author

• Anton, Miguel Medina

• Post-quantum Cryptography
• FAEST
• Hardware Implementation
• Digital Signature
• FPGA

Identifier

hdl:1920/14292

OAI identifier oai:identifier

oai:MARS:1920/14292