Reliability and Data Analysis of Wearout Mechanisms for Circuits

The objective of this research is to develop methodologies for the failure analysis of circuits, as well as investigate the factors for accelerating testing for front-end-of-line time-dependent dielectric breakdown (FEOL TDDB). The separation of wearout mechanisms for circuits will be investigated, and the identification of failure modes for the failure samples will be analyzed. SRAMs and ring oscillators will be used to study the failure modes. The systematic and random errors for online monitoring of SRAMS will also be examined. Furthermore, the testing plans for acceleration testing will also be explored for ring oscillators. Error reduction through sampling will also be used to find the best testing conditions for accelerated testing. This work provides a way for engineers to better understand aging monitoring of circuits, and to design better testing to collect failure data.

Level thesis:degree_level

Doctoral

Department dc:contributor.department

Electrical and Computer Engineering

Grantor dc:publisher

Georgia Institute of Technology

Year dc:date.issued

2020

Author dc:creator

• Hsu, Shu-Han

Advisor dc:contributor.advisor

• Milor, Linda S.

Committee members dc:contributor.committeemember

• Davenport, Mark
• Keezer, David
• Klein, Ben
• Wang, Ben

• Ring Oscillator
• SRAM
• Gate oxide breakdown
• FEOL TDDB
• Middle-of-line time-dependent dielectric breakdown
• MOL TDDB
• competing wearout mechanism
• on-line testing
• accelerated testing

Language dc:language.iso

en_US

Handle dc:identifier.uri

http://hdl.handle.net/1853/64993

OAI identifier oai:identifier

oai:repository.gatech.edu:1853/64993