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Technische Universiteit Eindhoven

Analyse en implementatie van IDaSS bouwstenen in VHDL

Degree

thesis:*
Name dc:type.qualificationname
Master
Level dc:type.qualificationlevel
Studentthesis types
Year dc:date.issued
1991

Author and committee

dc:creator, dc:contributor.*
Author dc:creator
  • Peerbooms, Marc
Advisor dc:contributor.advisor
  • Stevens, M.P.J.

Rights

Language dc:language
nld

Identifiers

dc:identifier.*
Identifier
oai:pure.tue.nl:studenttheses/d09c854e-cfde-4313-8b32-35465ae10d9f
OAI identifier oai:identifier
oai:pure.tue.nl:studenttheses/d09c854e-cfde-4313-8b32-35465ae10d9f

Chain of custody

source
Harvested from
Technische Universiteit Eindhoven
Base URL
pure.tue.nl/ws/oai
Last updated
2026-07-24
Source record
OAI-PMH GetRecord
citation

Peerbooms, Marc. Analyse en implementatie van IDaSS bouwstenen in VHDL. Studentthesis types thesis, 1991. https://research.tue.nl/nl/studentTheses/d09c854e-cfde-4313-8b32-35465ae10d9f