The design of a real time, fault-tolerant, multiprocessor system.

It is essential that real-time computers should be reliable. The majority of methods used to achieve fault tolerance in such systems employ a substantial duplication of hardware. This thesis suggests an alternative approach by placing a greater emphasis on firmware. It is shown that a greater degree of control can be obtained in a microprogrammed computer. Furthermore, this control can often be maintained after a component failure. The use of bit-slice components is proposed as a suitable medium for the implementation of such a microprogrammed, fault-tolerant system. It is also suggested that it is useful to overlay a high level language onto the microcoded system. A suitable language, Concurrent Pascal, is outlined. The architecture of the bit-slice processor, which has been built and tested, is described.A set of tests, performed at microcode level, to diagnose a fault are proposed. It is shown that these tests depend upon the cooperation of another error-free processor within the system. The special problems which occur when running microcode on a faulty processor are also discussed. The final chapter concludes that the use of microcode to achieve fault-tolerance can reduce the amount of hardware required. Suggestions for further research are also included.

Name dc:type.qualificationname

Ph.D.

Level dc:type.qualificationlevel

doctoral

Grantor dc:publisher.institution

Aston University

Year dc:date.issued

1983

Author dc:creator

• Sharp, Timothy Edwin

DOI dc:identifier.doi

https://doi.org/10.48780/publications.aston.ac.uk.00010625

OAI identifier oai:identifier

oai:publications.aston.ac.uk:10625