Global ETD Search
Search theses and dissertations gathered from participating repositories worldwide. Every result links back to the library that holds it. No account is needed.
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Showing 1 to 20 of 24 for “"Soft error"”.
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Soft-error resilient on-chip memory structures
Soft errors induced by energetic particle strikes in on-chip memory structures, such as L1 data/instruction caches and register files, have become an increasing challenge in designing new generation reliable microprocessors. Due to their transient/random nature, soft errors cannot be captured by …
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Soft Error Modeling and Analysis for Microprocessors
… this dissertation studies the architecture level soft error modeling and analysis problems. It provides new techniques to examine and take advantage of architecture level soft error behavior. We apply our tool to investigate the impact of technology scaling on soft errors. We also propose an …
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Cost Effective Soft Error Mitigation in Microprocessors
Finally, in this work, pains were taken to include as much detail as possible in the processor model and analysis methodology. We conclude with an examination of how making various approximations in the model and analysis methodology affect the experimental results and conclusions of this and other …
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Analysis and Design of Soft-Error Tolerant Circuits
… scheme for verification of proof-of-concept soft-error tolerant designs. It is based on the observation that crosstalk noise can be intentionally introduced into a dense layout to emulate SETS. It has been implemented on a test chip featuring the TPTT technique.
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Relyzer+: An open source tool for application-level soft error resiliency analysis
This Thesis was approved for publication on 2018-07-17 at 17:22.
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Setmap: a soft error tolerant mapping algorithm for FPGA designs with low power
… of reliability of devices becomes critical. Soft errors are increasingly becoming a reliability concern because of the shrinking process dimensions. In this thesis, we study the technology mapping problem for FPGA circuits to reduce the occurrence of soft errors under the chip performance …
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Error -Tolerant Digital Signal Processing
… general framework for deep submicron (DSM) noise/soft error-tolerance and provide its energy-distortion analysis. We introduce a novel algorithmic noise tolerance (ANT) technique referred to as reduced precision redundancy (RPR), which can be easily integrated to any DSP system. Combined with …
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Compiler-Directed Error Resilience for Reliable Computing
Error resilience has become as important as power and performance in modern computing architecture. There are various sources of errors that can paralyze real-world computing systems. Of particular interest to this dissertation are single-event errors. They can be the results of energetic particle …
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Measuring and predicting radiation-induced soft errors in microprocessors
… are generally not permanent, are labeled as soft errors. Measuring and predicting the soft error rate is important in designing reliable systems for the terrestrial or space radiation environment. Inexpensive, but powerful, Raspberry Pi™ computers without radiation hardening, mitigation, or …
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Single event upset hardened CMOS combinational logic and clock buffer design
… manifest as a wrong logic level causing failure. Soft errors or Single Event Upsets (SEU) caused by radiation strikes are one of the main failure modes in a VLSI circuit. Previous work predicts that soft error rate may dominate the failure rate in VLSI circuit compared to all other failure modes …
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ANALYTICAL METHODS TO PROPAGATE AND DIAGNOSE SINGLE EVENT TRANSIENTS
… of voltage have increased the probability of soft errors. In the current deep sub-micron technology, a small inaccuracy in computing the probability of occurrence of a soft error results in an unacceptably large chip failure rate. We propose a method that considers timing information to …
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Study of Radiation Effects on FPGA and GPU based Neural Networks Accelerator Designs
… changes can cause data to be modified, generate errors in logic, or even cause system crashes. Various radiation-resistant techniques have been proposed in this area of research, such as triple modular redundancy (TMR) , error-correcting codes (ECCs), etc., but the effectiveness of these designs …
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Study of Single Event Transient Error Mitigation
Single Event Transient (SET) errors in ground-level electronic devices are a growing concern in the radiation hardening field. However, effective SET mitigation technologies which satisfy ground-level demands such as generic, flexible, efficient, and fast, are limited. The classic Triple Modular …
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Charge Collection Studies on Integrated Circuit Test Structures using Heavy-Ion Microbeams and MEDICI Simulation Calculations
… of a bit, and thereby produce what is called a "soft" error, or Single Event Upset (SEU). Therefore, the response of ICs to natural radiation is of great concern for the reliability of future devices. Immunity to soft errors is listed as a requirement in the 1997 National Technology Roadmap for …
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High-level synthesis of triple modular redundant FPGA circuits with energy efficient error recovery mechanisms
… to mitigate the negative effects of soft errors in SRAM FPGA circuits. Triple Modular Redundancy (TMR) with periodic CM scrubbing or Module-based CM error recovery (MER) are popular techniques for mitigating soft errors in FPGA circuits. However, this thesis shows that MER does not …
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Characterizing the influence of neutron fields in causing single-event effects using portable detectors
… was standardized as the neutron accelerated soft error rate (ASER) testing in JEDEC JESD89A standard. However, several life testings indicated that the neutron flux density predictions given by the accelerated testings can have large errors. Up to a factor of 2 discrepancy was reported in the …
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Analysis and Mitigation of Multiple Radiation Induced Errors in Modern Circuits
… designs that can tolerate multiple simultaneous errors. A common type of error in memory elements is the double node upset (DNU) which has continued to become more common. All existing DNU tolerant designs either suffer from high area and performance overhead, may lose the data stored in the …
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Device and Circuit Level EMI Induced Vulnerability: Modeling and Experiments
… levels, categorized as non-permanent upsets (``Soft Errors'') and permanent damages (``Hard Failures''). The Soft Errors, such as temporary bit errors and waveform distortions, may happen or be intensified under EMI, as the transient disruptions activate unwanted and highly non-linear changes …
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Reliable chip design from low powered unreliable components
… rates of manufacturing defects are experienced. Soft errors, which traditionally affected only the memories, are now also resulting in logic circuit reliability degradation. A solution to these limitations is to integrate reliability assessment techniques into the Integrated Circuit(IC) design …
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Digital communication receiver algorithms and architectures for reduced complexity and high throughput
… MIMO tree detector, called the improved soft-input soft-output M-algorithm (ISS-MA), is presented. The proposed detector is developed for iterative detection and decoding (IDD) systems, which are known to achieve near-optimal detection performance for MIMO channels. In order to improve …
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