Global ETD Search
Search theses and dissertations gathered from participating repositories worldwide. Every result links back to the library that holds it. No account is needed.
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Showing 1 to 11 of 11 for “"Power-Gating"”.
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RT-Level power-gating models optimizing dynamic leakage-management
Power-Gating ist die vielversprechendste zur Laufzeit angewandte Technik, um Leckströme in Sub-100nm CMOS Transistoren zu verringern. Ihre Anwendung ist aber mit Zahlreichen Problemen wie Mehrkosten in Fläche und Energie und eine Verlangsamung der Schaltung verbunden. Generell ist eine Vorhersage …
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Emerging Power-Gating Techniques for Low Power Digital Circuits
… down and levels of integration increase, leakage power has become a critical problem in modern low-power microprocessors. This is especially true for ultra-low-voltage (ULV) circuits, where high levels of leakage force designers to chose relatively high threshold voltages, which limits …
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Reducing Subthreshold Leakage Power Through Hybrid MOSFET-NEMS Power Gating
… energy, using up battery life. Increasing power consumption is a rising concern to users and researchers alike. Power gating, turning off a blocks of hardware when idle, reduces static power consumption. The Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs) currently employed in …
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Use of high-level design information for enabling automation of fine-grained power gating
Leakage power reduction through power gating requires considerable design and verification effort. Conventionally, extensive analysis is required for dividing a heterogeneous design into power domains and generating control signals for power switches because of the need to preserve design behavior. …
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A micropower DSP for sensor applications
Ultra-low power systems, such as wireless microsensor networks or implanted medical devices, are driving the development of processors capable of performing increasingly complicated computations using mere microwatts of power. This thesis describes the design of a micropower DSP intended for medium …
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Instruction fusion and vector processor virtualization for higher throughput simultaneous multithreaded processors
… prototype shows a 6-11% reduction in dynamic power dissipation as well as a 17-45% decrease in code size with frequent performance improvements due to higher instruction cache hit rates. The second part of this dissertation deals with vector processors (VPs) which are commonly assigned …
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An ultra low power ADC for wireless micro-sensor applications
Autonomous micro-sensor nodes rely on low-power circuits to enable energy harvesting as a means of sustaining long-term, maintenance free operation. This work pursues the design of an ultra low-power analog-to-digital converter (ADC) whose sampling rate and resolution can be scaled to dynamically …
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Design and demonstration of integrated micro-electro-mechanical relay circuits for VLSI applications
… slowed, as a result of subthreshold leakage, and power density has increased with each new technology node. This has forced a move toward multi-core architectures, but the energy efficiency benefits of parallelism are limited by the sub-thresahold leakage and the minimum energy point for a given …
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Circuits and protocols for low duty cycle wireless systems
… which consumes a large fraction of the power in these devices, is the primary focus of this thesis. We present circuit (active RF, leakage management and timing) and protocol (medium access and coding) techniques for total power minimization in low duty cycle systems. First, we present a …
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Design Automation Flow for Voltage Adaptive Light Vth Hopping for Leakage Minimization in Sequential Circuits
… technology has resulted in increased leakage power consumption in VLSI circuits. Even though there are several power consumption reduction techniques in the industry today, the increasing leakage power consumption in the deep submicron CMOS technologies has manifested the need for more …
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Heterogeneous multiprocessor pipeline design for H.264 video encoder
… High Definition (HD1080). We further showed how power gating can be used in our platform to save on energy consumption. We also present a multi-ASIP architecture to provide for, and evaluate the performance of, a flexible and scalable platform for motion estimation at the HD1080 resolution, which …