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Search theses and dissertations gathered from participating repositories worldwide. Every result links back to the library that holds it. No account is needed.
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Showing 1 to 20 of 47 for “"Parallel Computer"”.
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Techniques for Parallel Computer Design
Made available in DSpace on 2014-12-13T18:01:42Z (GMT). No. of bitstreams: 1 7606703.pdf: 8355301 bytes, checksum: 84f8e9ed13a9ff8bede5fe7cbce5e7da (MD5) Previous issue date: 1975
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Digital image compression on parallel computer architectures
… project is to investigate the application of parallel processing techniques to digital image compression. Digital image compression is used to reduce the number of bits required to store an image in computer memory and/or transmit it over a communication link. Over the past decade advancements …
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Design and evaluation of the Hamal parallel computer
Parallel shared-memory machines with hundreds or thousands of processor-memory nodes have been built; in the future we will see machines with millions or even billions of nodes. Associated with such large systems is a new set of design challenges. Many problems must be addressed by an architecture …
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Strategies and tools for the exploitation of massively parallel computer systems
… software and strategies for the exploitation of parallel computer hardware, in particular distributed memory systems, and embedding these strategies within a parallelisation tool to allow the automatic generation of these strategies. The parallelisation of four structured mesh codes using the …
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Program Partitioning and Synchronization on Multiprocessor Systems (Parallel, Computer Architecture, Compiler)
… 1970's, vector machines have dominated the supercomputer market. Because of technological limitations, faster circuits and more levels of pipelining of vector processors can no longer satisfy the increasing demand for high-speed computation. Multiprocessing problems in parallel is a natural …
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High Performance Applications for the Single-Chip Message-Passing Parallel Computer
Computer architects continue to push the limits of modern microprocessors. By using techniques such as out-of-order execution, branch prediction, and dynamic scheduling, designers have found ways to speed execution. However, growing architectural complexity has led to unsustained development and …
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The application of parallel computer technology to the dynamic analysis of suspension bridges
… is concerned with the application of distributed computer technology to the solution of non-linear structural dynamic problems, in particular the onset of aerodynamic instabilities in long span suspension bridge structures, such as flutter which is a catastrophic aeroelastic phenomena. The thesis …
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Performance analysis of machine learning applications on rapid: a highly parallel computer architecture
… cars, speech recognition, image processing, computer vision, molecular biology, security etc. A lot of recent research involves evaluation of machine learning applications on different architectures. In this thesis, we evaluate the performance of six common machine learning algorithms: …
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The Design of the Node for the Single Chip Message Passing (SCMP) Parallel Computer
… These features tend to exploit instruction level parallelism. However, a point of diminishing returns has been reached in this effort. Instead, these additional transistors could be used to take advantage of thread level parallelism (TLP). This type of parallelism focuses on hundreds of …
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From experiment to design – fault characterization and detection in parallel computer systems using computational accelerators
… detection capabilities and overheads in hybrid computer systems (e.g., using CPUs and Graphics Processing Units, or GPUs), and consequently to improve the scalability of parallel computer systems using computational accelerators. The experimental validation studies were conducted to help us …
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ADAM : a decentralized parallel computer architecture featuring fast thread and data migration and a uniform hardware abstraction
The furious pace of Moore's Law is driving computer architecture into a realm where the the speed of light is the dominant factor in system latencies. The number of clock cycles to span a chip are increasing, while the number of bits that can be accessed within a clock cycle is decreasing. Hence, …
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Evaluating the Design and Performance of a Single-Chip Parallel Computer Using System-Level Models and Methodology
… design advancements to exploit instruction-level parallelism on single-processor computer systems have become exceedingly complex, and modern applications are presenting an increasing potential to be partitioned and parallelized at the thread level. The new Single-Chip, Message-Passing (SCMP) …
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Parallel and Adaptive Galerkin Methods for Radiative Transfer Problems
… are developed and their implementation on parallel computer architectures is discussed. A posteriori error estimates allow for efficient grid adaptation in two and three space dimensions.
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Confiabilidade de estruturas reticuladas em ambientes de processamento paralelo
… was developed. The software was implemented in a parallel computer with a host (microVax) associated to 21 nodes 68020 Motorola processors with 2 Mbytes of memory.
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Simulation of a novel multiprocessor system based on dataflow principles
… a novel processor architecture for a massively parallel computer system. An existing simulation of the Fresh Breeze architecture has been extended to incorporate a multi-level memory hierarchy and dynamic load balancing. An efficient hardware-based garbage collection mechanism has been proposed. …
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A parallel algorithm for simple roots of polynomials
… evaluation. The method is designed for an SIMD parallel computer. The algorithm is compared to two other frequently used polynomial root finders, the Jenkins-Traub algorithm and Laguerre’s method.
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Task flow: A novel approach to fine-grain wafer-scale parallel computing
This thesis introduces a parallel computer architecture known as task flow. Simple replicated cells contain both memory packets and processing logic. Each memory packet contains a data field, the next instruction, and a link. Transmission packets flow between memory packets to communicate …
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On Solving the Large Sparse Generalized Eigenvalue Problem
… and aspects concerning an implementation on a parallel computer are discussed.
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The mesh of trees architecture for parallel computation
… as both a special-purpose and a general-purpose parallel computer. A family of special-purpose VLSI architectures for computing an ($n\sb1 \times n\sb2 \times \cdots \times n\sb{d}$)-point multidimensional DFT over $\doubz\sb{M}$, the ring of integers modulo $M$, is proposed. Using the …
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Numerical modeling of borehole acoustics : parallel implementation of a loggin-while-drilling (LWD) model
… for the shear velocity of the rock. A Beowulf parallel computer is used to implement the finite difference code showing the efficiency of cluster computing in a discretized space.
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