Global ETD Search
Search theses and dissertations gathered from participating repositories worldwide. Every result links back to the library that holds it. No account is needed.
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Showing 1 to 13 of 13 for “"PCI Express"”.
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Exploitation from Malicious PCI Express Peripherals
… from malicious peripherals delivered over the PCI Express (PCIe) protocol. Malicious peripherals can be plugged directly into internal PCIe slots, or connected via an external Thunderbolt connection. To prove this thesis, we designed and built a new PCIe attack platform. We discovered that a …
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Creating a PCI express interconnect in the gem5 simulator
In this thesis, the objective was to implement a PCI (Peripheral Component Interconnect) Express interconnect in the gem5 architecture simulator. The interconnect was designed with the goal of aiding accurate modeling of PCI Express-based devices in gem5 in the future. The PCI Express interconnect …
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PCI Express multi-root switch reconfiguration during system operation
… One solution lies with the recently developed PCI Express multi-root partitionable switch. The partitionable switch is highly configurable and provides a means of altering the allocation of I/O devices amongst multiple hosts. This offers a range of unexplored possibilities to improve system …
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A PCI Express to PCIX Bridge optimized for performance and area
… digital logic core that is compliant with the PCI Express to PCIX Bridge Specification. The core supports PCI Express and PCIX transactions, x16 PCI Express link widths, 32 and 64-bit PCIX link widths, all PCI Express and PCIX packet sizes, transaction ordering and queuing, relaxed ordering, …
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Design and simulation of a PCI Express Gen 3.0 communication channel
PCI Express (PCIe) is a serial interconnect technology, developed by the PCI-Sig organization, which provides high bandwidth data transmission with the added benefits of reduced board space requirements, smaller connectors and simplified PCB layouts. Since faster and faster data rates are more …
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Design and automated testing of PCI express interface of proton computed tomography detectors.
… design proposed by this thesis works at the PCI Express Transaction Layer in collaboration with Xilinx 7 Series FPGAs Integrated Block for PCI Express. By automated testing and results evaluation, the new design can speed up the original Ethernet link speed by a factor of 30, At the same …
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Přenosy rastrových dat v FPGA
… části bylo vytvořeno koncové zařízení PCI Express, které zajišťuje přenos dat mezi čipem PFGA a RAM pamětí počítače. Jako zdroj obrazových dat pro zpracování byla k FPGA připojena videokamera Unicam M621 s rozhraním Ethernet. Projekt byl realizován na vývojovém kitu Xilinx SP605. …
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GPGPU-Enabled Physics Based Deformed Model Simulation
… data from client GPU and host CPU via the PCI-Express bus are avoided. Real-time simulation is made possible with this technique for many cases that otherwise is not possible.
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Design of a low-cost high speed data capture card for the Hubble Sphere Hydrogen Survey
… and ï¬ nally transmits the data through a 4-lane PCI-Express interface to a standard PC where the majority of the processing is performed. The system implementation is then described where issues relating to the process of transforming schematics into a physical PCB, and HSHS integration are …
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PicoRF: A PC-based SDR Platform using a High Performance PCIe Plug-in Card Extension
… modified during run-time. Through a high speed PCIe connection, partial bitstreams can be downloaded from the host PC to the FPGA at a very high speed making it possible for the radio to modify its function in very short time intervals and greatly reducing the service interruption time. Control …
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Um módulo de hardware de tempo real de correspondência semi global para um sistema de visão estéreo
… se comunicando através do barramento PCI-Express usando o framework RIFFA 2.2. Este sistema de visão estéreo completo permitiu obter um ganho de desempenho de 21x em relação a abordagem SGM em processador oferecida pela biblioteca OpenCV e dissipando 2 Watts de potência.
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GPU-based, Microsecond Latency, Hecto-Channel MIMO Feedback Control of Magnetically Confined Plasmas
… directly into GPU memory using peer-to-peer PCI Express transfers. The described design has been implemented in a new, GPU-based control system for the High-Beta Tokamak -- Extended Pulse (HBT-EP) device. The system is built from commodity hardware and uses an NVIDIA GeForce GPU and D-TACQ …