Global ETD Search
Search theses and dissertations gathered from participating repositories worldwide. Every result links back to the library that holds it. No account is needed.
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Showing 1 to 20 of 55 for “"Multi-core Processors"”.
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Predictive power management for multi-core processors
… of when to apply dynamic power management in multi-core processors by accounting for and predicting power and performance demand at the core-level. By tracking performance events at the processor core or thread-level, power consumption can be accounted for at each of the major components of …
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Using program behaviour to exploit heterogeneous multi-core processors
Multi-core CPU architectures have become prevalent in recent years. A number of multi-core CPUs consist of not only multiple processing cores, but multiple different types of processing cores, each with different capabilities and specialisations. These heterogeneous multi-core architectures (HMAs) …
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Efficient and Verifiable Timing Channel Protection for Multi-Core Processors
… different programs in the shared resources of a multi-core processor. For example, an attacker program's cache lines can be evicted by a victim program, which allows the attacker to infer secret information about the victim. Timing channel attacks pose serious threats to contemporary computing …
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Design And Analysis Of Time-Predicatable Single-Core And Multi-Core Processors
… the instruction cache is studied on both single core processors and multi-core processors. It is observed that many features in modern microprocessor architecture such as cache memories and branch prediction are in favor of average-case performance, which can significantly compromise the time …
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Optimizing high locality memory references in cache coherent shared memory multi-core processors
… streams in cache coherent shared memory multi-processors. More specifically, this thesis classifies such memory objects into spatial and temporal false shared memory objects. The underlying hypothesis is that the policy of treating all the memory objects as being permanently shared …
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Next-generation safety-critical systems using COTS based homogeneous multi-core processors and heterogeneous MPSoCS
… is pushing the transition from a single-core processor to a multicore processor where multiple single-core processors are packed into a single chip. With recent hardware advancements and the evolution of new challenging applications in autonomy such as self-driving cars and unmanned …
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SCA-Resistant and High-Performance Embedded Cryptography Using Instruction Set Extensions and Multi-Core Processors
… embedded devices are not able to use high-end processors. They cannot run at extremely high frequencies either. Since most embedded devices are portable and deployed in the field, attackers are able to get physical access and to mount attacks as they want. For example, the power dissipation, …
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Scheduling on Asymmetric Architectures
… mechanisms and policies for scheduling dynamic multi-grain parallelism on heterogeneous multi-core processors. Heterogeneous multi-core processors integrate conventional cores that run legacy codes with specialized cores that serve as computational accelerators. The term multi-grain parallelism …
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Technically superior but unloved : a multi-faceted perspective on multi-core's failure to meet expectations in embedded systems
A growing number of embedded multi-core processors from several vendors now offer several technical advantages over single-core architectures. However, despite these advantages, adoption of multi-core processors in embedded systems has fallen short of expectations and not increased significantly in …
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A Scalable Approach to Multi-core Prototyping
In recent years, multi-core processors and multi-processor networks have grown in popularity as a solution to the limits on increasing clock speed, rising power consumption, and the nanometer manufacturing processes. Multi-core processors and multi-processor networks are seen as the next step in …
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On The Parallelization Of Integer Polynomial Multiplication
… the advent of hardware accelerator technologies, multi-core processors and GPUs, much effort for taking advantage of those architectures by designing parallel algorithms has been made. To achieve this goal, one needs to consider both algebraic complexity and parallelism, plus making efficient use …
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STUDIES OF PERFORMANCE AND PREDICTABILITY OF CACHE-LOCKING
… locking method. The performance of single and multi-core processors and multiple levels of caches were studied. The time predictability of the single core system was studied and the cost of the time predictability was determined for each locking method. Cache-locking in the Level 2 cache had …
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Cache coherence strategies in a many-core processor
… and low latency. However, as computer processor core counts increase, maintaining coherence between caches becomes increasingly difficult. Current methods of cache coherence work well in small-scale multi-core processors, however, the viability of cache coherence as processors scale to thousands …
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Multithreaded Natural Language Processing Tasks
<p> Multithreading, an interactive application may allow a program to continue running even if part of it is blocked or is performing a lengthy operation, thereby improving software performance. The performance of a multithreaded application can be improved further in a multi-core processor …
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Efficient evaluation of functionally represented volumetric objects.
… devices such as graphics programming units and multi-core processors.
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Delay, stability, and resource tradeoffs in large distributed service systems
… examples such as cloud computing facilities and multi-core processors. A canonical framework for modeling such systems is provided by a parallel queueing model with n servers, where service requests arrive stochastically over time as a single stream of jobs of rate proportional to n, and where a …
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A comparative study of shared memory parallelism on regular and irregular data structures using OpenMP and Galois
… can be exploited in most applications on today's multi-core processors. However, inefficient data organization, data dependencies, and hardware constraints limit scalable parallelization of these applications. In this thesis, performance and the impact of some optimizations is compared and …
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A 9GHz injection locked loop optical clock receiver in 32-nm CMOS
The bottleneck of multi-core processors performance will be the I/O, for both on-chip core-to-core I/0, and off-chip core-to-memory. Integrated silicon photonics can potentially provide high-bandwidth low-power signal and clock distribution for multicore processors, by exploiting …
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Intra- and Inter-chip Communication Support for Asymmetric Multicore Processors with Explicitly Managed Memory Hierarchies
The use of asymmetric multi-core processors with on-chip computational accelerators is becoming common in a variety of environments ranging from scientific computing to enterprise applications. The focus of current research has been on making efficient use of individual systems, and porting …
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