Global ETD Search
Search theses and dissertations gathered from participating repositories worldwide. Every result links back to the library that holds it. No account is needed.
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Showing 1 to 20 of 47 for “"CMOS technologies"”.
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A study of CMOS technologies for image sensor applications
CMOS (Complementary Metal-Oxide-Silicon) imager technology, as compared with mature CCD (Charge-Coupled Device) imager technology, has the advantages of higher circuit integration, lower power consumption, and potentially lower price. The advantages make this technology competent for the …
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Design Techniques for Frequency Synthesizers in Highly Scaled CMOS Technologies
While extremely scaled CMOS transistors are believed to cause many design concerns especially for conventional analog circuits, CMOS technology scaling, on the other hand, has also opened up new opportunities for analog and mixed-mode circuit designs to mitigate design challenges by the speed …
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Circuits and algorithms for pipelined ADCs in scaled CMOS technologies
CMOS technology scaling is creating significant issues for analog circuit design. For example, reduced signal swing and device gain make it increasingly difficult to realize high-speed, high-gain feedback loops traditionally used in switched capacitor circuits. This research involves two …
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Trade-offs between performance and reliability of sub 100-nm RF-CMOS technologies
… in sub 100-nm silicon-on-insulator (SOI) CMOS technologies. Such trade-offs can be used to demonstrate high performance reliable circuits in scaled technologies. Several CMOS reliability concerns such as hot-carrier stress, ionizing irradiation damage, RF stress, temperature effects, and …
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Design and ESD Protection of Wideband, Radio Frequency Integrated Circuits in CMOS Technologies
Finally, the work concludes with a summary of the design of a 6.25-Gb/s serial I/O transceiver for backplane communications that implements error correction coding to reduce equalization power and transmitter output swing. The design of the transmit driver with pre-emphasis equalization, receiver …
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Modeling simulation and design guidelines for EOS/ESD protection circuits in CMOS technologies
Electrical Overstress (EOS) and Electrostatic Discharge (ESD) are major causes for integrated circuit (IC) field failures. Industry surveys indicate that nearly 50% of all IC field failures can be attributed to EOS/ESD events. The susceptibility to EOS/ESD increases as the minimum feature size in …
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Terahertz Detectors and Imaging Array with In-Pixel Low-Noise Amplification and Filtering in CMOS technologies
… difficulty that has hampered the maturation of technologies operating in this region lies in the fact that much unlike its bordering millimeter and infrared regions, generation and detection of THz radiation is not trivial. Yet, such is the intriguing nature and properties of the terahertz …
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Performance limits of RF power CMOS
… response of state-of-the-art deeply scaled CMOS technologies has made them an ideal candidate for millimeter-wave applications. A few research groups have already demonstrated single chip CMOS radios at 60 GHz. However, the design of power amplifiers in CMOS still remains a significant …
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Topics in Totally Self-Checking Circuits and Testable Cmos Circuits
… existing gate-level TSC circuits in nMOS, Domino-CMOS and standard CMOS technologies, so that they are TSC with respect to physical failures, are described. Design methods that reduce the transistor count, delay and the number of tests of TSC checkers are also given.
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A zero-crossing switched-capacitor filter design
Design of switched capacitor circuits in scaled CMOS technologies is becoming difficult because of low device intrinsic gain and reduced power supply voltage. To solve these problems, comparator-based switched-capacitor (CBSC) circuits and zero-crossing based circuits (ZCBC) were suggested as a …
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Comparator design and analysis for comparator-based switched-capacitor circuits
… with the migration of designs to scaled CMOS technologies. The reduced power supply voltages and the low intrinsic device gain in scaled technologies offset some of the benefits of the reduced device parasitics. An alternative comparator-based switched-capacitor circuit (CBSC) technique …
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Algorithmic approaches to enhancing and exploiting application-level error tolerance
As late-CMOS process scaling leads to increasingly variable circuits/logic and as most post-CMOS technologies in sight appear to have largely stochastic characteristics, hardware reliability has become a first-order design concern. To make matters worse, emerging computing systems are becoming …
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Deeply scaled CMOS for RF power applications
… RF modules places high demands on the base CMOS technology. In this regard, the integration of the power amplifier (PA) function becomes an increasing challenge as technology geometries and supply voltages scale down. Gate length (Lg) scaling yields improved frequency response, promising …
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CMOS Active Pixel Sensors for Digital Cameras: Current State-of-the-Art
… complementary metal oxide semiconductor (CMOS) based active pixel sensors (APS), which are characterized by reduced pixel size, give fast readouts and reduced noise. APS are used in many applications such as mobile cameras, digital cameras, Webcams, and many consumer, commercial and …
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RF to Millimeter-wave Linear Power Amplifiers in Nanoscale CMOS SOI Technology
… and high operating frequency of nanoscale CMOS technologies have propelled their applications into RF and microwave systems. Implementing fully-integrated RF to millimeter-wave (mm-wave) CMOS power amplifiers (PAs), nevertheless, remains challenging due to the low breakdown voltages of CMOS …
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Mixed-signal analog-digital circuits design on the pre-diffused digital array using trapezoidal association of transistors
… and TAT versions in 1.0mm and 0.5mm digital CMOS technologies. Most of the circuits were prototyped in full-custom and TAT-based on pre-diffused SOT arrays. An innovative demonstration of the TAT technique is shown with the design and implementation of a mixed-signal analog system, i. e., a …
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Development of Transition Metal Dichalcogenide Memristive Materials and Devices for Neuromorphic Systems
… computational demand is pushing conventional CMOS technologies toward their limits, creating an urgent need for energy-efficient computing architectures. Neuromorphic engineering addresses this challenge by replicating the brain’s co-location of memory and computation in hardware. Transition …
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Designing Low -Power Communication Systems via Noise-Tolerance
… technique. Simulation results in a 0.35-mum CMOS technology are provided in comparison to static and domino circuits. A MAC ASIC design is presented along with the measured results. We investigate the reliability degradation due to leakage in two ∼0.1-mum CMOS technologies. Two …
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