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Showing 1 to 20 of 126 for “"AND gate"”.

  1. Branch Guided Metrics for Functional and Gate-level Testing

    … increasing complexity of modern day processors and system-on-a-chip (SOCs), designers invest a lot of time and resources into testing and validating these designs. To reduce the time-to-market and cost, the techniques used to validate these designs have to constantly improve. Since most of the …

    vt Repository record for Branch Guided Metrics for Functional and Gate-level Testing (opens in a new tab)

  2. Machine-learning-assisted state and gate engineering for quantum technologies

    … of such an interdisciplinary line of research and illustrates how machine learning provides a valuable add-on to standard techniques used in the context of quantum technologies. <br/><br/>Specifically, we will first study the problem of devising time-independent dynamics implementing target …

    qu-belfast Repository record for Machine-learning-assisted state and gate engineering for quantum technologies (opens in a new tab)

  3. Comparative wearing tests on different makes of globe and gate valves

    Thesis (B.S.)--Massachusetts Institute of Technology, Dept. of Mechanical Engineering, 1910.

    mit Repository record for Comparative wearing tests on different makes of globe and gate valves (opens in a new tab)

  4. Green engineering and gate-to gate life cycle assessments for pharmaceutical products

    … of this thesis focused on the environmental and processing metrics during the development of two different drugs. Previous research in life cycle assessments and green engineering have focused on other products and processes, but only a limited amount of studies have been conducted for …

    rowan Repository record for Green engineering and gate-to gate life cycle assessments for pharmaceutical products (opens in a new tab)

  5. A comparison of electrical performance analysis between nanoscale double-gate and gate-all-around nanowire mosfet

    The Double-Gate and Gate-all-Around are said to be the promising candidates to pursue Complementary-Metal-Oxide Semiconductor scaling. When the device is scaled down, several problems arise such as the short-channel effect, excessive transistor gate leakage and power consumption. The purpose of …

    uthm Repository record for A comparison of electrical performance analysis between nanoscale double-gate and gate-all-around nanowire mosfet (opens in a new tab)

  6. Galvanic isolation interface and gate driver for power switching systems in GaN technology [Interfaccia di isolamento galvanico e gate driver per sistemi di commutazione di potenza in tecnologia GaN]

    … e circuiti innovativi per pilotaggio di gate. Inoltre, la tesi introduce tecniche innovative per affrontare le sfide associate ai dispositivi GaN, come l’elevata variabilità dei parametri, l’assenza di transistor a canale p e la necessità di una protezione ESD efficace. I risultati …

    catania Repository record for Galvanic isolation interface and gate driver for power switching systems in GaN technology [Interfaccia di isolamento galvanico e gate driver per sistemi di commutazione di potenza in tecnologia GaN] (opens in a new tab)

  7. Comportement hydrodynamique des barrières réactives in situ utilisées pour la diffusion passive

    Les eaux souterraines sont consommées par une grande proportion de la population mondiale incluant le Canada et le Québec. En raison de la sollicitation des sols et des aquifères par l'activité humaine, plusieurs produits chimiques contaminent les eaux souterraines, particulièrement les produits …

    ets-quebec Repository record for Comportement hydrodynamique des barrières réactives in situ utilisées pour la diffusion passive (opens in a new tab)

  8. Stochastic modeling of inducible logical gates in Escherichia coli

    … We extend a previous study of a logical AND gate system by observing the effect of individual components of this system on its functionality using experimental techniques and computational models. The previous AND gate was synthesized using operator sequences from the well characterized …

    umn Repository record for Stochastic modeling of inducible logical gates in Escherichia coli (opens in a new tab)

  9. Functional models for MOS VLSI circuits

    … generation of functional models for switch- and gate-level circuits is presented. In addition, the use of these models is considered in four CAD applications: switch-level simulation, verification of transistor-level circuits, the initializability of synchronous sequential circuits, and

    uiuc Repository record for Functional models for MOS VLSI circuits (opens in a new tab)

  10. Finite Element Method Modeling Of Advanced Electronic Devices

    … structure with multi-step discontinuities and soft wall lateral confinement. Radiation mechanism and conditions are examined by numerical simulation of dispersion relations and transport properties. The study of geometry variations shows its significant impact on the radiation intensity and

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  11. EMI Suppression and Performance Enhancement for Truly Differential Gate Drivers

    The increasing market demand for wideband gap (WBG) power switches has led to heightened competition to increase converter power density, switching frequencies, and reduce form factor, among other factors. However, this technology has also brought about an increase in encounters with …

    vt Repository record for EMI Suppression and Performance Enhancement for Truly Differential Gate Drivers (opens in a new tab)

  12. Split gate tunnel barriers in double top gated silicon metal-oxide-semiconductor nanostructures

    … due to the weak spin-orbit coupling of silicon and the ability to eliminate background nuclear spins by isotopic enrichment. One way spin qubits can be realized in silicon is by using donor-bound electron spins. Individual donor atoms intentionally implanted into tunnel barriers of silicon have …

    unm Repository record for Split gate tunnel barriers in double top gated silicon metal-oxide-semiconductor nanostructures (opens in a new tab)

  13. Processing-Microstructure Models for Short- and Long-Fiber Thermoplastic Composites

    … molding simulation. Both a literature review and our experimental data strongly suggest that the majority of fiber length degradation occurs in the earlier stages of injection molding, in the screw nozzle, runners, and gate. A better understanding of the melting and flow conditions upstream of …

    uiuc Repository record for Processing-Microstructure Models for Short- and Long-Fiber Thermoplastic Composites (opens in a new tab)

  14. Anomalous Hall effect and persistent valley currents in graphene p-n junctions/

    … valley currents can be controlled via the bias and gate voltages, enabling a variety of potentially useful valley transport phenomena.

    mit Repository record for Anomalous Hall effect and persistent valley currents in graphene p-n junctions/ (opens in a new tab)

  15. Electron transport in ultrathin-body fully depleted n-MOSFETS fabricated on strained silicon directly on insulator with body thickness ranging from 22nm to 25 nm

    … the body thickness is scaled. Effective mobility and device body thickness were extracted using current-voltage and gate-to-channel capacitance-voltage measurements as well as cross section transmission electron microscopy. Devices with body thicknesses ranging from 2 nm to 25 nm are studied. …

    mit Repository record for Electron transport in ultrathin-body fully depleted n-MOSFETS fabricated on strained silicon directly on insulator with body thickness ranging from 22nm to 25 nm (opens in a new tab)

  16. Numerical Synthesis of Arbitrary Multi-Qubit Unitaries with low 𝑇-Count

    Quantum gate synthesis based on numerical optimization produces efficient circuits for NISQ (Noisy Intermediate-Scale Quantum) computing by minimizing the num- ber of two-qubit gates. The requirements for fault tolerant quantum computing are significantly different in that some single qubit gates …

    mit Repository record for Numerical Synthesis of Arbitrary Multi-Qubit Unitaries with low 𝑇-Count (opens in a new tab)

  17. A Constant ON-Time 3-Level Buck Converter for Low Power Applications

    … load condition, primarily from their power stage and control being optimized for heavy load. The battery life of a smart camera can be extended through improvement of the light load efficiency of the buck converter. This thesis research investigated the first stage converter of a car black box to …

    vt Repository record for A Constant ON-Time 3-Level Buck Converter for Low Power Applications (opens in a new tab)

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