Global ETD Search
Search theses and dissertations gathered from participating repositories worldwide. Every result links back to the library that holds it. No account is needed.
Results
Showing 1 to 20 of 180 for “"ADCS"”.
-
A jittered-sampling correction technique for ADCs
In Analogue to Digital Converters (ADCs) jittered sampling raises the noise floor; this leads to a decrease in its Signal to Noise ratio (SNR) and its effective number of bits (ENOB). This research studies a technique that compensate for the effects of sampling with a jittered clock. A thorough …
-
Techniques for low-power high-performance ADCs
Analog-to-digital converters (ADCs) are essential building blocks in many electronic systems which require digital signal processing and storage of analog signals. Traditionally, ADCs are considered a power hungry circuit. This thesis investigates ADC design techniques to achieve high-performance …
-
Mitigating timing noise in ADCs through digital post-processing
The accuracy of analog-to-digital converters (ADCs) is greatly affected by the uniformity of the times at which samples of the analog input signal are taken. The error in the sample times, known as jitter, or timing noise, has a non-linear, time-varying and input-dependent effect on the sample …
-
Digital calibration of nonlinear memory errors in sigma-delta ADCs
Background digital calibration techniques based on an output-referred error model are proposed to linearize sigma-delta (ΣΔ) modulators. A sequential power series (a special form of Volterra series) is found sufficient to model the nonlinear memory errors in a discrete-time integrator (DTI), which …
-
Design of residue amplifiers for high-speed pipelined-SAR ADCs
… as follows: Chapter 1 introduces the concepts of ADCs and residue amplification. Chapter 2 discusses the backgrounds on architecture of the SAR ADC and pipelined-SAR ADC, and introduces residue amplifier design for pipelined-SAR ADC. Chapter 3 introduces the ADC architecture that is used with the …
-
Circuits and algorithms for pipelined ADCs in scaled CMOS technologies
… Estimation (COE) nulls offsets in pipelined ADCs. Second is the development of circuits for a new architecture called zero-crossing based circuits (ZCBC) that is more amenable to scaling trends. To demonstrate these circuits and algorithms, two different ADCs were designed: an 8 bit, 200MS/s …
-
Dynamic Element Matching Techniques For Delta-Sigma ADCs With Large Internal Quantizers
<p>This thesis presents two methods that enable high internal quantizer resolution in delta-sigma analog-to-digital converters. Increasing the quantizer resolution in a delta-sigma modulator can increase SNR, improve stability and reduce integrator power consumption. However, each added bit of …
-
Calibration of sampling clock skew in high-speed, high-resolution time-interleaved ADCs
… demand for high-resolution and high-resolution ADCs. In order to raise the sampling rates of ADCs in a power efficient manner, time-interleaving is an essential technique, whereby N ADC channels, each operating at a sampling frequency of fs, are used to achieve an effective conversion rate of N …
-
Aportaciones al diseño de ADCs en tecnologías nanométricas y para entornos de alta radiación
El trabajo presentado a lo largo de esta Tesis Doctoral está intrínsecamente relacionado con la evolución del diseño de circuitos integrados analógicos y de señal mixta empleando tecnologías nanométricas. En los últimos años, el desarrollo de dichas tecnologías ha posibilitado un avance gigantesco …
-
Mixed signal compensation of sampling errors in ADCs due to noisy DPLL clock sources
… a method to compensate for sampling errors in ADCs when a noisy digital phase locked-loop (DPLL). A time domain DPLL is built by MATLAB Simulink with a phase noise model. The phase noise is obtained from a measured oscillator. When DPLL achieve lock, the time-to-digital converter (TDC) provides …
-
Digital ADCs and ultra-wideband RF circuits for energy constrained wireless applications by Denis Clarke Daly.
Ongoing advances in semiconductor technology have enabled a multitude of portable, low power devices like cellular phones and wireless sensors. Most recently, as transistor device geometries reach the nanometer scale, transistor characteristics have changed so dramatically that many traditional …
-
Development and analysis of a small satellite attitude determination and control system testbed
Attitude Determination and Control Systems (ADCS) are critical to the operation of satellites that require attitude knowledge and/or attitude control to achieve mission success. Furthermore, ADCS systems only operate as designed in the reduced friction, micro-gravity environment of space. …
-
Adipose-Derived Adult Stem Cells as Trophic Mediators of Tendon Regeneration
… trophic mediators in vitro. We hypothesized that ADCs would produce growth and chemotactic factors important in tendon healing and capable of inducing cell migration and matrix protein gene expression. Superficial digital flexor tendons and adipose tissue were harvested from eight adult horses and …
-
Hardware-in-the-Loop Simulation for Verification of CubeSat Attitude Determination and Control Subsystem
… and control subsystem, commonly known as an ADCS. Tasked with creating and maintaining an appropriate orientation for the satellite, the ADCS is a complex system, and often there are difficulties verifying the functionality of such algorithms.</p> <p>This thesis investigates a …
-
How consulting a medium after bereavement influences the grieving process – an interpretative phenomenological analysis
… of ‘assisted’ after-death communications (ADCs) (that is, through a medium), on the grieving process of the bereaved. It also sought to explore the existential dimensions experienced by the bereaved. Six bereaved participants in the UK who had experienced assisted ADCs took part in semi- …
-
Code-error calibration techniques for two-step flash analog-to-digital converters
Flash-type analog-to-digital converters (ADCs) have been extensively used for high-speed applications such as high-performance TVs, image recognition, radar, and medical instrumentation. However, the linearity of these state-of-the-art flash-type ADCs has been limited to 10 bits by ratio mismatch …
-
Frequency selective analog to digital converter design : optimality, fundamental limitations, and performance bounds
… and design of Analog to Digital Converters (ADCs) is studied within an optimal feedback control framework. A general ADC is modeled as a causal, discrete-time dynamical system with outputs taking values in a finite set. The performance measure is defined as the worst-case average intensity of …
-
Improved qualification and algorithms for illinisat-2 attitude determination and control
… The Attitude Determination and Control System (ADCS) of the bus is purely magnetic, relying on magnetometers for determination and magnetorquers for actuation. The pure magnetic ADCS is favorable because of its low power, volume and mass contributions to the satellite’ platform, but this comes …
Page 1 of 9