Test scheduling and configuration in a self-repairing computer

The structure of cellular arrays and Tessellation Automata are introduced as a "fabric" for use in the implementation of self-testing and self-repairing computational configurations. Testing schemes are suggested for use in the "self-testing" operation of this computer system. Sequentially propagating tests are examined for both finite and infinite geometries of cellular arrays. A static parallel testing procedure is also suggested which offers these advantages: (1) the parallel testing procedure is transparent to the computer configuration, (2) very little computational down-time" results from testing, and (3) the parallel testing procedure does not initiate reconfiguration of the computational configuration.

Name thesis:degree_name

Master of Science

Level thesis:degree_level

masters

Discipline thesis:degree_discipline

Electrical Engineering

Department dc:contributor.department

Electrical Engineering

Grantor dc:publisher

Virginia Tech

Year dc:date.issued

1977

Author dc:creator

• Gregory, Walter Lee

Chair dc:contributor.committeechair

• Thompson, Richard A.

Committee members dc:contributor.committeemember

• Gray, Festus Gail
• Bostian, Charles W.

• computational configurations

Statement dc:rights

• In Copyright

Licence dc:rights.uri

• http://rightsstatements.org/vocab/InC/1.0/

Language dc:language.iso

en

Dc Identifier Other

etd-06122010-020251

OAI identifier oai:identifier

oai:vtechworks.lib.vt.edu:10919/43244