{"id":{"repo_id":"vt","oai_identifier":"oai:vtechworks.lib.vt.edu:10919/43244"},"canonical_url":"https://search.dev.ndltd.org/etd/vt/oai:vtechworks.lib.vt.edu:10919/43244","repository":{"repo_id":"vt","name":"Virginia Tech","base_url":"https://vtechworks.lib.vt.edu/oai/request"},"display":{"title":"Test scheduling and configuration in a self-repairing computer","abstract":"The structure of cellular arrays and Tessellation Automata are introduced as a \"fabric\" for use in the implementation of self-testing and self-repairing computational configurations. Testing schemes are suggested for use in the \"self-testing\" operation of this computer system. Sequentially propagating tests are examined for both finite and infinite geometries of cellular arrays. A static parallel testing procedure is also suggested which offers these advantages: (1) the parallel testing procedure is transparent to the computer configuration, (2) very little computational down-time\" results from testing, and (3) the parallel testing procedure does not initiate reconfiguration of the computational configuration.","abstract_html":"The structure of cellular arrays and Tessellation Automata are introduced as a &quot;fabric&quot; for use in the implementation of self-testing and self-repairing computational configurations. Testing schemes are suggested for use in the &quot;self-testing&quot; operation of this computer system. Sequentially propagating tests are examined for both finite and infinite geometries of cellular arrays. A static parallel testing procedure is also suggested which offers these advantages: (1) the parallel testing procedure is transparent to the computer configuration, (2) very little computational down-time&quot; results from testing, and (3) the parallel testing procedure does not initiate reconfiguration of the computational configuration.","abstract_has_math":false,"creators":["Gregory, Walter Lee"],"institution":"Virginia Tech","degree_name":"Master of Science","degree_level":"masters","degree_discipline":"Electrical Engineering","degree_department":"Electrical Engineering","school":null,"contributors":[],"advisors":[],"committee_chairs":["Thompson, Richard A."],"committee_members":["Gray, Festus Gail","Bostian, Charles W."],"year":1977,"date_issued":"1977-05-15","date_published":"1977-05-15","updated_at":"2026-07-22T22:19:03Z","subjects":["computational configurations"],"languages":["en"],"rights":["In Copyright"],"rights_urls":["http://rightsstatements.org/vocab/InC/1.0/"],"identifier_entries":[{"key":"dc:identifier.other","label":"Dc Identifier Other","values":["etd-06122010-020251"],"render_values":[{"text":"etd-06122010-020251","href":null,"code":true}]}]},"links":{"outbound_url":"http://hdl.handle.net/10919/43244","outbound_label":"Handle","outbound_source":"dc:identifier.uri"},"metadata_groups":[{"id":"people","label":"People","entries":[{"key":"dc:contributor.committeechair","label":"Committee Chair","values":["Thompson, Richard A."]},{"key":"dc:contributor.committeemember","label":"Committee Member","values":["Gray, Festus Gail","Bostian, Charles W."]},{"key":"dc:contributor.department","label":"Department","values":["Electrical Engineering"]},{"key":"dc:creator","label":"Author","values":["Gregory, Walter Lee"]}]},{"id":"academic_context","label":"Academic Context","entries":[{"key":"dc:date.accessioned","label":"Dc Date Accessioned","values":["2014-03-14T21:38:20Z"]},{"key":"dc:date.available","label":"Dc Date Available","values":["2014-03-14T21:38:20Z","2010-06-12"]},{"key":"dc:date.issued","label":"Date","values":["1977-05-15"]},{"key":"dc:publisher","label":"Institution","values":["Virginia Tech"]},{"key":"dc:type","label":"Dc Type","values":["Thesis"]},{"key":"dc:type.dcmitype","label":"Dc Type Dcmitype","values":["Text"]},{"key":"thesis:degree_discipline","label":"Discipline","values":["Electrical Engineering"]},{"key":"thesis:degree_level","label":"Degree Level","values":["masters"]},{"key":"thesis:degree_name","label":"Degree Name","values":["Master of Science"]},{"key":"thesis:institution_name","label":"Thesis Institution Name","values":["Virginia Polytechnic Institute and State University"]}]},{"id":"subjects_keywords","label":"Subjects and Keywords","entries":[{"key":"dc:subject","label":"Dc Subject","values":["computational configurations"]}]},{"id":"language_rights","label":"Language and Rights","entries":[{"key":"dc:language.iso","label":"Language (ISO)","values":["en"]},{"key":"dc:rights","label":"Dc Rights","values":["In Copyright"]},{"key":"dc:rights.uri","label":"Rights URI","values":["http://rightsstatements.org/vocab/InC/1.0/"]}]},{"id":"identifiers","label":"Identifiers","entries":[{"key":"dc:identifier.other","label":"Dc Identifier Other","values":["etd-06122010-020251"]},{"key":"dc:identifier.uri","label":"Identifier URI","values":["http://hdl.handle.net/10919/43244"]}]},{"id":"additional","label":"Additional Metadata","entries":[{"key":"dc:description.abstract","label":"Abstract","values":["The structure of cellular arrays and Tessellation Automata are introduced as a \"fabric\" for use in the implementation of self-testing and self-repairing computational configurations. Testing schemes are suggested for use in the \"self-testing\" operation of this computer system. Sequentially propagating tests are examined for both finite and infinite geometries of cellular arrays. A static parallel testing procedure is also suggested which offers these advantages: (1) the parallel testing procedure is transparent to the computer configuration, (2) very little computational down-time\" results from testing, and (3) the parallel testing procedure does not initiate reconfiguration of the computational configuration."]},{"key":"dc:description.degree","label":"Dc Description Degree","values":["Master of Science"]},{"key":"dc:format.medium","label":"Dc Format Medium","values":["BTD"]},{"key":"dc:format.mimetype","label":"Dc Format Mimetype","values":["application/pdf"]},{"key":"dc:title","label":"Title","values":["Test scheduling and configuration in a self-repairing computer"]}]}],"canonical_facts":{"dc:contributor.committeechair":["Thompson, Richard A."],"dc:contributor.committeemember":["Gray, Festus Gail","Bostian, Charles W."],"dc:contributor.department":["Electrical Engineering"],"dc:creator":["Gregory, Walter Lee"],"dc:date.accessioned":["2014-03-14T21:38:20Z"],"dc:date.available":["2014-03-14T21:38:20Z","2010-06-12"],"dc:date.issued":["1977-05-15"],"dc:description.abstract":["The structure of cellular arrays and Tessellation Automata are introduced as a \"fabric\" for use in the implementation of self-testing and self-repairing computational configurations. Testing schemes are suggested for use in the \"self-testing\" operation of this computer system. Sequentially propagating tests are examined for both finite and infinite geometries of cellular arrays. A static parallel testing procedure is also suggested which offers these advantages: (1) the parallel testing procedure is transparent to the computer configuration, (2) very little computational down-time\" results from testing, and (3) the parallel testing procedure does not initiate reconfiguration of the computational configuration."],"dc:description.degree":["Master of Science"],"dc:format.medium":["BTD"],"dc:format.mimetype":["application/pdf"],"dc:identifier.other":["etd-06122010-020251"],"dc:identifier.uri":["http://hdl.handle.net/10919/43244"],"dc:language.iso":["en"],"dc:publisher":["Virginia Tech"],"dc:rights":["In Copyright"],"dc:rights.uri":["http://rightsstatements.org/vocab/InC/1.0/"],"dc:subject":["computational configurations"],"dc:title":["Test scheduling and configuration in a self-repairing computer"],"dc:type":["Thesis"],"dc:type.dcmitype":["Text"],"thesis:degree_discipline":["Electrical Engineering"],"thesis:degree_level":["masters"],"thesis:degree_name":["Master of Science"],"thesis:institution_name":["Virginia Polytechnic Institute and State University"]},"updated_at":"2026-07-22T22:19:03Z"}