{"id":{"repo_id":"york","oai_identifier":"oai:yorkspace.library.yorku.ca:10315/42870"},"canonical_url":"https://search.dev.ndltd.org/etd/york/oai:yorkspace.library.yorku.ca:10315/42870","repository":{"repo_id":"york","name":"York University","base_url":"https://yorkspace.library.yorku.ca/oai/request"},"display":{"title":"Implementation of a Neural Network-Based ASIC Chip for Mobile DNA Devices","abstract":"Portable DNA sequencing, particularly using nanopore technology, has the potential to revolutionize genomics by making it accessible in a wide range of environments. However, current state-of-the-art devices face significant challenges due to the lack of integrated bioinformatics processing capabilities. This research addresses these challenges by developing specialized System-on-Chip (SoC) architectures designed for real-time bioinformatics analysis, integrating both a machine learning (ML)-based basecalling accelerator and an Edit Distance (ED) accelerator for sequence comparison. The proposed SoC architecture, based on an open-source RISC-V core, features hardware accelerators tailored for the computational demands of nanopore DNA sequencing. Performance evaluation was conducted in two stages: first through FPGA prototyping, followed by integration into a fabricated SoC. The FPGA prototyping demonstrated nearly 2,000x speedup for ML-based basecalling compared to a standalone RISC-V core, while maintaining an accuracy rate of 83.7%. It also showed an 11.5x and 1.2x energy efficiency improvement over x86 CPUs and high-end GPUs, respectively. The ED accelerator for sequence comparison achieved a 538x boost in energy efficiency compared to commercial CPUs. The fabricated SoC, implemented in a 22-nm CMOS process, successfully demonstrated the feasibility of integrating advanced bioinformatics tasks into a single, power-efficient chip. Evaluation of the fabricated SoC confirmed its capability for real-time, mobile DNA sequencing with high accuracy, reduced power consumption, and significantly improved processing speed, all while reducing dependency on external computational devices. This research represents a significant step towards realizing a fully integrated, stand-alone DNA sequencing solution, capable of performing comprehensive bioinformatics analyses in real time.","abstract_html":"Portable DNA sequencing, particularly using nanopore technology, has the potential to revolutionize genomics by making it accessible in a wide range of environments. However, current state-of-the-art devices face significant challenges due to the lack of integrated bioinformatics processing capabilities. This research addresses these challenges by developing specialized System-on-Chip (SoC) architectures designed for real-time bioinformatics analysis, integrating both a machine learning (ML)-based basecalling accelerator and an Edit Distance (ED) accelerator for sequence comparison. The proposed SoC architecture, based on an open-source RISC-V core, features hardware accelerators tailored for the computational demands of nanopore DNA sequencing. Performance evaluation was conducted in two stages: first through FPGA prototyping, followed by integration into a fabricated SoC. The FPGA prototyping demonstrated nearly 2,000x speedup for ML-based basecalling compared to a standalone RISC-V core, while maintaining an accuracy rate of 83.7%. It also showed an 11.5x and 1.2x energy efficiency improvement over x86 CPUs and high-end GPUs, respectively. The ED accelerator for sequence comparison achieved a 538x boost in energy efficiency compared to commercial CPUs. The fabricated SoC, implemented in a 22-nm CMOS process, successfully demonstrated the feasibility of integrating advanced bioinformatics tasks into a single, power-efficient chip. Evaluation of the fabricated SoC confirmed its capability for real-time, mobile DNA sequencing with high accuracy, reduced power consumption, and significantly improved processing speed, all while reducing dependency on external computational devices. This research represents a significant step towards realizing a fully integrated, stand-alone DNA sequencing solution, capable of performing comprehensive bioinformatics analyses in real time.","abstract_has_math":false,"creators":["Wu, Zhongpan"],"institution":null,"degree_name":null,"degree_level":null,"degree_discipline":null,"degree_department":null,"school":null,"contributors":[],"advisors":["Magierowski, Sebastian"],"committee_chairs":[],"committee_members":[],"year":2025,"date_issued":"2025-04-10","date_published":"2025-04-10","updated_at":"2026-07-24T06:33:43Z","subjects":[],"languages":["en"],"rights":["Author owns copyright, except where explicitly noted. Please contact the author directly with licensing requests."],"rights_urls":[],"identifier_entries":[]},"links":{"outbound_url":"https://hdl.handle.net/10315/42870","outbound_label":"Handle","outbound_source":"dc:identifier.uri"},"metadata_groups":[{"id":"people","label":"People","entries":[{"key":"dc:contributor.advisor","label":"Advisor","values":["Magierowski, Sebastian"]},{"key":"dc:creator","label":"Author","values":["Wu, Zhongpan"]}]},{"id":"academic_context","label":"Academic Context","entries":[{"key":"dc:date.accessioned","label":"Dc Date Accessioned","values":["2025-04-10T10:57:17Z"]},{"key":"dc:date.available","label":"Dc Date Available","values":["2025-04-10T10:57:17Z"]},{"key":"dc:date.issued","label":"Date","values":["2025-04-10"]},{"key":"dc:type","label":"Dc Type","values":["Electronic Thesis or Dissertation"]}]},{"id":"language_rights","label":"Language and Rights","entries":[{"key":"dc:language","label":"Dc Language","values":["en"]},{"key":"dc:rights","label":"Dc Rights","values":["Author owns copyright, except where explicitly noted. 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The proposed SoC architecture, based on an open-source RISC-V core, features hardware accelerators tailored for the computational demands of nanopore DNA sequencing. Performance evaluation was conducted in two stages: first through FPGA prototyping, followed by integration into a fabricated SoC. The FPGA prototyping demonstrated nearly 2,000x speedup for ML-based basecalling compared to a standalone RISC-V core, while maintaining an accuracy rate of 83.7%. It also showed an 11.5x and 1.2x energy efficiency improvement over x86 CPUs and high-end GPUs, respectively. The ED accelerator for sequence comparison achieved a 538x boost in energy efficiency compared to commercial CPUs. The fabricated SoC, implemented in a 22-nm CMOS process, successfully demonstrated the feasibility of integrating advanced bioinformatics tasks into a single, power-efficient chip. Evaluation of the fabricated SoC confirmed its capability for real-time, mobile DNA sequencing with high accuracy, reduced power consumption, and significantly improved processing speed, all while reducing dependency on external computational devices. This research represents a significant step towards realizing a fully integrated, stand-alone DNA sequencing solution, capable of performing comprehensive bioinformatics analyses in real time."]},{"key":"dc:title","label":"Title","values":["Implementation of a Neural Network-Based ASIC Chip for Mobile DNA Devices"]}]}],"canonical_facts":{"dc:contributor.advisor":["Magierowski, Sebastian"],"dc:creator":["Wu, Zhongpan"],"dc:date.accessioned":["2025-04-10T10:57:17Z"],"dc:date.available":["2025-04-10T10:57:17Z"],"dc:date.issued":["2025-04-10"],"dc:description.abstract":["Portable DNA sequencing, particularly using nanopore technology, has the potential to revolutionize genomics by making it accessible in a wide range of environments. However, current state-of-the-art devices face significant challenges due to the lack of integrated bioinformatics processing capabilities. This research addresses these challenges by developing specialized System-on-Chip (SoC) architectures designed for real-time bioinformatics analysis, integrating both a machine learning (ML)-based basecalling accelerator and an Edit Distance (ED) accelerator for sequence comparison. The proposed SoC architecture, based on an open-source RISC-V core, features hardware accelerators tailored for the computational demands of nanopore DNA sequencing. Performance evaluation was conducted in two stages: first through FPGA prototyping, followed by integration into a fabricated SoC. The FPGA prototyping demonstrated nearly 2,000x speedup for ML-based basecalling compared to a standalone RISC-V core, while maintaining an accuracy rate of 83.7%. It also showed an 11.5x and 1.2x energy efficiency improvement over x86 CPUs and high-end GPUs, respectively. The ED accelerator for sequence comparison achieved a 538x boost in energy efficiency compared to commercial CPUs. The fabricated SoC, implemented in a 22-nm CMOS process, successfully demonstrated the feasibility of integrating advanced bioinformatics tasks into a single, power-efficient chip. Evaluation of the fabricated SoC confirmed its capability for real-time, mobile DNA sequencing with high accuracy, reduced power consumption, and significantly improved processing speed, all while reducing dependency on external computational devices. This research represents a significant step towards realizing a fully integrated, stand-alone DNA sequencing solution, capable of performing comprehensive bioinformatics analyses in real time."],"dc:identifier.uri":["https://hdl.handle.net/10315/42870"],"dc:language":["en"],"dc:rights":["Author owns copyright, except where explicitly noted. Please contact the author directly with licensing requests."],"dc:title":["Implementation of a Neural Network-Based ASIC Chip for Mobile DNA Devices"],"dc:type":["Electronic Thesis or Dissertation"]},"updated_at":"2026-07-24T06:33:43Z"}