This thesis investigates the application of ScaleHLS, a high-level synthesis (HLS) tool, to enhance Field-Programmable Gate Array (FPGA) synthesis for space applications, with a focus on the Antarctic Demonstrator Advanced Particle-astrophysics Telescope (ADAPT) project. The study explores how ScaleHLS optimizes the transformation of C code into FPGA-compatible designs to improve computational efficiency and resource utilization.
The research details the process of adapting ADAPT's computational algorithms for FPGA using ScaleHLS, emphasizing the tool's effectiveness in streamlining the code-to-hardware translation. A performance evaluation highlights significant improvements in resource management and operational speed, demonstrating the tool's impact on FPGA synthesis.
These findings illustrate ScaleHLS's potential to advance hardware design and set a foundation for further developments in high-level synthesis, crucial for enhancing spaceborne computational systems.
","abstract_html":"<p>This thesis investigates the application of ScaleHLS, a high-level synthesis (HLS) tool, to enhance Field-Programmable Gate Array (FPGA) synthesis for space applications, with a focus on the Antarctic Demonstrator Advanced Particle-astrophysics Telescope (ADAPT) project. The study explores how ScaleHLS optimizes the transformation of C code into FPGA-compatible designs to improve computational efficiency and resource utilization.</p> <p>The research details the process of adapting ADAPT's computational algorithms for FPGA using ScaleHLS, emphasizing the tool's effectiveness in streamlining the code-to-hardware translation. A performance evaluation highlights significant improvements in resource management and operational speed, demonstrating the tool's impact on FPGA synthesis.</p> <p>These findings illustrate ScaleHLS's potential to advance hardware design and set a foundation for further developments in high-level synthesis, crucial for enhancing spaceborne computational systems.</p>","abstract_has_math":false,"creators":["Wang, Ruoxi"],"institution":null,"degree_name":"Master of Science (MS)","degree_level":"Thesis","degree_discipline":"Electrical & Systems Engineering","degree_department":null,"school":null,"contributors":["Roger Chamberlain","James Buckley Shantanu Chakrabartty"],"advisors":[],"committee_chairs":[],"committee_members":[],"year":2024,"date_issued":"2024-05-08T07:00:00Z","date_published":"2024-05-08T07:00:00Z","updated_at":"2026-07-24T06:13:05Z","subjects":["FPGA","HLS","ScaleHLS","APT","ADAPT","Other Electrical and Computer Engineering"],"languages":["English (en)"],"rights":["I have not registered my thesis with the U.S. Copyright Office, and do not intend to."],"rights_urls":[],"identifier_entries":[{"key":"dc:identifier","label":"Identifier","values":["https://openscholarship.wustl.edu/eng_etds/1012"],"render_values":[{"text":"https://openscholarship.wustl.edu/eng_etds/1012","href":"https://openscholarship.wustl.edu/eng_etds/1012","code":true}]}]},"links":{"outbound_url":"https://doi.org/10.7936/rh7e-wj57","outbound_label":"DOI","outbound_source":"dc:identifier"},"metadata_groups":[{"id":"people","label":"People","entries":[{"key":"dc:contributor","label":"Contributor","values":["Roger Chamberlain","James Buckley Shantanu Chakrabartty"]},{"key":"dc:creator","label":"Author","values":["Wang, Ruoxi"]}]},{"id":"academic_context","label":"Academic Context","entries":[{"key":"dc:date.available","label":"Dc Date Available","values":["2024-11-02T07:00:00Z"]},{"key":"thesis:degree_discipline","label":"Discipline","values":["Electrical & Systems Engineering","McKelvey School of Engineering"]},{"key":"thesis:degree_level","label":"Degree Level","values":["Thesis"]},{"key":"thesis:degree_name","label":"Degree Name","values":["Master of Science (MS)"]}]},{"id":"subjects_keywords","label":"Subjects and Keywords","entries":[{"key":"dc:subject","label":"Dc Subject","values":["FPGA","HLS","ScaleHLS","APT","ADAPT","Other Electrical and Computer Engineering"]}]},{"id":"language_rights","label":"Language and Rights","entries":[{"key":"dc:language","label":"Dc Language","values":["English (en)"]},{"key":"dc:rights","label":"Dc Rights","values":["I have not registered my thesis with the U.S. Copyright Office, and do not intend to."]}]},{"id":"identifiers","label":"Identifiers","entries":[{"key":"dc:identifier","label":"Identifier","values":["https://doi.org/10.7936/rh7e-wj57","https://openscholarship.wustl.edu/eng_etds/1012"]}]},{"id":"additional","label":"Additional Metadata","entries":[{"key":"dc:description.abstract","label":"Abstract","values":["This thesis investigates the application of ScaleHLS, a high-level synthesis (HLS) tool, to enhance Field-Programmable Gate Array (FPGA) synthesis for space applications, with a focus on the Antarctic Demonstrator Advanced Particle-astrophysics Telescope (ADAPT) project. The study explores how ScaleHLS optimizes the transformation of C code into FPGA-compatible designs to improve computational efficiency and resource utilization.
The research details the process of adapting ADAPT's computational algorithms for FPGA using ScaleHLS, emphasizing the tool's effectiveness in streamlining the code-to-hardware translation. A performance evaluation highlights significant improvements in resource management and operational speed, demonstrating the tool's impact on FPGA synthesis.
These findings illustrate ScaleHLS's potential to advance hardware design and set a foundation for further developments in high-level synthesis, crucial for enhancing spaceborne computational systems.
"]},{"key":"dc:title","label":"Title","values":["Enhancing FPGA Synthesis for Space Applications: Performance Evaluation of ScaleHLS in the ADAPT Project"]}]}],"canonical_facts":{"dc:contributor":["Roger Chamberlain","James Buckley Shantanu Chakrabartty"],"dc:creator":["Wang, Ruoxi"],"dc:date.available":["2024-11-02T07:00:00Z"],"dc:description.abstract":["This thesis investigates the application of ScaleHLS, a high-level synthesis (HLS) tool, to enhance Field-Programmable Gate Array (FPGA) synthesis for space applications, with a focus on the Antarctic Demonstrator Advanced Particle-astrophysics Telescope (ADAPT) project. The study explores how ScaleHLS optimizes the transformation of C code into FPGA-compatible designs to improve computational efficiency and resource utilization.
The research details the process of adapting ADAPT's computational algorithms for FPGA using ScaleHLS, emphasizing the tool's effectiveness in streamlining the code-to-hardware translation. A performance evaluation highlights significant improvements in resource management and operational speed, demonstrating the tool's impact on FPGA synthesis.
These findings illustrate ScaleHLS's potential to advance hardware design and set a foundation for further developments in high-level synthesis, crucial for enhancing spaceborne computational systems.
"],"dc:identifier":["https://doi.org/10.7936/rh7e-wj57","https://openscholarship.wustl.edu/eng_etds/1012"],"dc:language":["English (en)"],"dc:rights":["I have not registered my thesis with the U.S. Copyright Office, and do not intend to."],"dc:subject":["FPGA","HLS","ScaleHLS","APT","ADAPT","Other Electrical and Computer Engineering"],"dc:title":["Enhancing FPGA Synthesis for Space Applications: Performance Evaluation of ScaleHLS in the ADAPT Project"],"thesis:degree_discipline":["Electrical & Systems Engineering","McKelvey School of Engineering"],"thesis:degree_level":["Thesis"],"thesis:degree_name":["Master of Science (MS)"]},"updated_at":"2026-07-24T06:13:05Z"}