{"id":{"repo_id":"washington","oai_identifier":"oai:digital.lib.washington.edu:1773/52783"},"canonical_url":"https://search.dev.ndltd.org/etd/washington/oai:digital.lib.washington.edu:1773/52783","repository":{"repo_id":"washington","name":"University of Washington","base_url":"https://digital.lib.washington.edu/server/oai/request"},"display":{"title":"Efficient Gaussian Random Number Generators in HLS4ML","abstract":"Efficient hardware implementation of neural networks, such as Variational Autoencoders (VAEs), often relies on FPGAs for their balance of performance and energy efficiency. VAEs require accurate Gaussian distributions for latent space sampling, but traditional methods like the Central Limit Theorem (CLT) are resource-intensive. The Multihat method combines combinational logic and CLT to achieve high tail accuracy with reduced hardware costs. This thesis discusses the Multihat method implemented using High-Level Synthesis (HLS), optimized for scalability and integrated into HLS4ML as a custom layer for FPGA deployment. Results show the Multihat GRNG generates statistically accurate Gaussian distributions, with improved resource efficiency and performance compared to CLT-based approaches.","abstract_html":"Efficient hardware implementation of neural networks, such as Variational Autoencoders (VAEs), often relies on FPGAs for their balance of performance and energy efficiency. VAEs require accurate Gaussian distributions for latent space sampling, but traditional methods like the Central Limit Theorem (CLT) are resource-intensive. The Multihat method combines combinational logic and CLT to achieve high tail accuracy with reduced hardware costs. This thesis discusses the Multihat method implemented using High-Level Synthesis (HLS), optimized for scalability and integrated into HLS4ML as a custom layer for FPGA deployment. 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VAEs require accurate Gaussian distributions for latent space sampling, but traditional methods like the Central Limit Theorem (CLT) are resource-intensive. The Multihat method combines combinational logic and CLT to achieve high tail accuracy with reduced hardware costs. This thesis discusses the Multihat method implemented using High-Level Synthesis (HLS), optimized for scalability and integrated into HLS4ML as a custom layer for FPGA deployment. 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VAEs require accurate Gaussian distributions for latent space sampling, but traditional methods like the Central Limit Theorem (CLT) are resource-intensive. The Multihat method combines combinational logic and CLT to achieve high tail accuracy with reduced hardware costs. This thesis discusses the Multihat method implemented using High-Level Synthesis (HLS), optimized for scalability and integrated into HLS4ML as a custom layer for FPGA deployment. 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