{"id":{"repo_id":"vt","oai_identifier":"oai:vtechworks.lib.vt.edu:10919/94469"},"canonical_url":"https://search.dev.ndltd.org/etd/vt/oai:vtechworks.lib.vt.edu:10919/94469","repository":{"repo_id":"vt","name":"Virginia Tech","base_url":"https://vtechworks.lib.vt.edu/oai/request"},"display":{"title":"Optimal constructs for chip level modeling","abstract":"Analysis and comparison of nine different Hardware Description Languages is presented. Comparison features are discussed and each language is analysed according to the comparison features, which are: sequencing mechanisms, applicability to generic structures, abstraction of data and operation, timing mode, communication mechanisms, and instantiation and interconnection of elements. Based on the analysis of the languages, optimal constructs for chip level modeling are extracted. Example descriptions of a microprocessor system MARK 2 are presented.","abstract_html":"Analysis and comparison of nine different Hardware Description Languages is presented. Comparison features are discussed and each language is analysed according to the comparison features, which are: sequencing mechanisms, applicability to generic structures, abstraction of data and operation, timing mode, communication mechanisms, and instantiation and interconnection of elements. Based on the analysis of the languages, optimal constructs for chip level modeling are extracted. Example descriptions of a microprocessor system MARK 2 are presented.","abstract_has_math":false,"creators":["Han, Dongil"],"institution":"Virginia Polytechnic Institute and State University","degree_name":"M.S.","degree_level":"masters","degree_discipline":"Electrical Engineering","degree_department":"Electrical Engineering","school":null,"contributors":[],"advisors":[],"committee_chairs":[],"committee_members":[],"year":1986,"date_issued":"1986","date_published":"1986","updated_at":"2026-07-22T22:20:20Z","subjects":[],"languages":["en_US"],"rights":["In Copyright"],"rights_urls":["http://rightsstatements.org/vocab/InC/1.0/"],"identifier_entries":[]},"links":{"outbound_url":"http://hdl.handle.net/10919/94469","outbound_label":"Handle","outbound_source":"dc:identifier.uri"},"metadata_groups":[{"id":"people","label":"People","entries":[{"key":"dc:contributor.department","label":"Department","values":["Electrical Engineering"]},{"key":"dc:creator","label":"Author","values":["Han, Dongil"]}]},{"id":"academic_context","label":"Academic Context","entries":[{"key":"dc:date.accessioned","label":"Dc Date Accessioned","values":["2019-10-10T19:11:50Z"]},{"key":"dc:date.available","label":"Dc Date Available","values":["2019-10-10T19:11:50Z"]},{"key":"dc:date.issued","label":"Date","values":["1986"]},{"key":"dc:publisher","label":"Institution","values":["Virginia Polytechnic Institute and State University"]},{"key":"dc:type","label":"Dc Type","values":["Thesis"]},{"key":"dc:type.dcmitype","label":"Dc Type Dcmitype","values":["Text"]},{"key":"thesis:degree_discipline","label":"Discipline","values":["Electrical Engineering"]},{"key":"thesis:degree_level","label":"Degree Level","values":["masters"]},{"key":"thesis:degree_name","label":"Degree Name","values":["M.S."]},{"key":"thesis:institution_name","label":"Thesis Institution Name","values":["Virginia Polytechnic Institute and State University"]}]},{"id":"language_rights","label":"Language and Rights","entries":[{"key":"dc:language.iso","label":"Language (ISO)","values":["en_US"]},{"key":"dc:rights","label":"Dc Rights","values":["In Copyright"]},{"key":"dc:rights.uri","label":"Rights URI","values":["http://rightsstatements.org/vocab/InC/1.0/"]}]},{"id":"identifiers","label":"Identifiers","entries":[{"key":"dc:identifier.uri","label":"Identifier URI","values":["http://hdl.handle.net/10919/94469"]}]},{"id":"additional","label":"Additional Metadata","entries":[{"key":"dc:description.abstract","label":"Abstract","values":["Analysis and comparison of nine different Hardware Description Languages is presented. Comparison features are discussed and each language is analysed according to the comparison features, which are: sequencing mechanisms, applicability to generic structures, abstraction of data and operation, timing mode, communication mechanisms, and instantiation and interconnection of elements. Based on the analysis of the languages, optimal constructs for chip level modeling are extracted. Example descriptions of a microprocessor system MARK 2 are presented."]},{"key":"dc:description.degree","label":"Dc Description Degree","values":["M.S."]},{"key":"dc:format.mimetype","label":"Dc Format Mimetype","values":["application/pdf"]},{"key":"dc:title","label":"Title","values":["Optimal constructs for chip level modeling"]}]}],"canonical_facts":{"dc:contributor.department":["Electrical Engineering"],"dc:creator":["Han, Dongil"],"dc:date.accessioned":["2019-10-10T19:11:50Z"],"dc:date.available":["2019-10-10T19:11:50Z"],"dc:date.issued":["1986"],"dc:description.abstract":["Analysis and comparison of nine different Hardware Description Languages is presented. Comparison features are discussed and each language is analysed according to the comparison features, which are: sequencing mechanisms, applicability to generic structures, abstraction of data and operation, timing mode, communication mechanisms, and instantiation and interconnection of elements. Based on the analysis of the languages, optimal constructs for chip level modeling are extracted. Example descriptions of a microprocessor system MARK 2 are presented."],"dc:description.degree":["M.S."],"dc:format.mimetype":["application/pdf"],"dc:identifier.uri":["http://hdl.handle.net/10919/94469"],"dc:language.iso":["en_US"],"dc:publisher":["Virginia Polytechnic Institute and State University"],"dc:rights":["In Copyright"],"dc:rights.uri":["http://rightsstatements.org/vocab/InC/1.0/"],"dc:title":["Optimal constructs for chip level modeling"],"dc:type":["Thesis"],"dc:type.dcmitype":["Text"],"thesis:degree_discipline":["Electrical Engineering"],"thesis:degree_level":["masters"],"thesis:degree_name":["M.S."],"thesis:institution_name":["Virginia Polytechnic Institute and State University"]},"updated_at":"2026-07-22T22:20:20Z"}