Modeling and control of three-phase PWM converters

Switching and average models are developed for major three-phase PWM converters. The models are correct for the case when the voltage sources or capacitors with nonzero parasitic resistances are placed across the converter dc port or ac terminals. The effects of the parasitic resistances are described by additional time-varying terms in the average models depending not only on the duty cycle values, but also on the modulation strategy. For analysis purposes, the terms due to parasitic resistances can be approximated by their fundamental frequency components ( dc or line/output frequency). A new small-signal model in the rotating coordinates is developed for a uniformly sampled three-phase modulator. The model reveals that the uniform sampling introduces delays in the control inputs and cross-coupling between the control inputs. Furthermore, the model is time varying causing the complete small-signal model consisting of the modulator and converter small signal models in the rotating coordinates to become time-varying. Based on the derived expressions, the worst-case point for the control design can be identified. A modulation strategy which reduces delay due to the uniform sampling can be selected. The modulator model is partially verified experimentally. Influence of delays due to the uniformly sampled PWM and digital implementation is investigated in the closed-loop control design for the boost rectifier. Designs of standard control schemes, consisting of inner current loops and a superimposed voltage loop, are presented and verified experimentally. They can be extended to other three-phase PWM converters. A new control algorithm is developed and verified experimentally for power factor correction (PFC) applications of three-phase PWM rectifiers, where a rectifier is preceded by an input filter. The algorithm provides output voltage regulation and input displacement factor (IDF) compensation without resorting to the control of input filter states. It allows separate design of the input filter and the rectifier closed-loop control. A criterion for small-signal stability of the integrated system, consisting of the rectifier with output voltage regulation and the input filter, has been formulated and applied to the buck rectifier with the input filter.

Name thesis:degree_name

Ph. D.

Level thesis:degree_level

doctoral

Discipline thesis:degree_discipline

Electrical Engineering

Department dc:contributor.department

Electrical Engineering

Grantor dc:publisher

Virginia Tech

Year dc:date.issued

1995

Author dc:creator

• Hiti, Silva

Chair dc:contributor.committeechair

• Borojević, Dušan

Committee members dc:contributor.committeemember

• Lee, Fred C.
• Bay, John S.
• Baumann, William T.
• Wheeler, Robert L.

• parasitic resistances

Statement dc:rights

• In Copyright

Licence dc:rights.uri

• http://rightsstatements.org/vocab/InC/1.0/

Language dc:language.iso

en

Dc Identifier Other

etd-09192008-063200

OAI identifier oai:identifier

oai:vtechworks.lib.vt.edu:10919/77984