{"id":{"repo_id":"vt","oai_identifier":"oai:vtechworks.lib.vt.edu:10919/74474"},"canonical_url":"https://search.dev.ndltd.org/etd/vt/oai:vtechworks.lib.vt.edu:10919/74474","repository":{"repo_id":"vt","name":"Virginia Tech","base_url":"https://vtechworks.lib.vt.edu/oai/request"},"display":{"title":"A methodology for self-testing microprocessors","abstract":"Procedures for designing and writing a CPU self-test program are developed for microprocessors in general. Specific examples of these procedures are then provided for both a simple example processor and for the Intel 8080; fault coverage statistics are provided for the 8080 test. The self-test methodology overlaps the tests for different elements within the CPU in order to attain a very quick test suitable for periodic background testing. Generalized fault classes are defined for the CPU and methods for sensitizing and detecting these faults are detailed. General procedures and hardware requirements for self-testing the entire microcomputer system within its operating environment are discussed. Fault simulation techniques are also discussed; simulation provides feedback on the effectiveness of a self-test and allows the test to be improved for better coverage and faster execution.","abstract_html":"Procedures for designing and writing a CPU self-test program are developed for microprocessors in general. Specific examples of these procedures are then provided for both a simple example processor and for the Intel 8080; fault coverage statistics are provided for the 8080 test. The self-test methodology overlaps the tests for different elements within the CPU in order to attain a very quick test suitable for periodic background testing. Generalized fault classes are defined for the CPU and methods for sensitizing and detecting these faults are detailed. General procedures and hardware requirements for self-testing the entire microcomputer system within its operating environment are discussed. Fault simulation techniques are also discussed; simulation provides feedback on the effectiveness of a self-test and allows the test to be improved for better coverage and faster execution.","abstract_has_math":false,"creators":["Haislett, David W."],"institution":"Virginia Polytechnic Institute and State University","degree_name":"Master of Science","degree_level":"masters","degree_discipline":"Electrical Engineering","degree_department":"Electrical Engineering","school":null,"contributors":[],"advisors":[],"committee_chairs":[],"committee_members":[],"year":1982,"date_issued":"1982","date_published":"1982","updated_at":"2026-07-22T22:18:46Z","subjects":[],"languages":["en_US"],"rights":["In Copyright"],"rights_urls":["http://rightsstatements.org/vocab/InC/1.0/"],"identifier_entries":[]},"links":{"outbound_url":"http://hdl.handle.net/10919/74474","outbound_label":"Handle","outbound_source":"dc:identifier.uri"},"metadata_groups":[{"id":"people","label":"People","entries":[{"key":"dc:contributor.department","label":"Department","values":["Electrical Engineering"]},{"key":"dc:creator","label":"Author","values":["Haislett, David W."]}]},{"id":"academic_context","label":"Academic Context","entries":[{"key":"dc:date.accessioned","label":"Dc Date Accessioned","values":["2017-01-30T21:02:19Z"]},{"key":"dc:date.available","label":"Dc Date Available","values":["2017-01-30T21:02:19Z"]},{"key":"dc:date.issued","label":"Date","values":["1982"]},{"key":"dc:publisher","label":"Institution","values":["Virginia Polytechnic Institute and State University"]},{"key":"dc:type","label":"Dc Type","values":["Thesis"]},{"key":"dc:type.dcmitype","label":"Dc Type Dcmitype","values":["Text"]},{"key":"thesis:degree_discipline","label":"Discipline","values":["Electrical Engineering"]},{"key":"thesis:degree_level","label":"Degree Level","values":["masters"]},{"key":"thesis:degree_name","label":"Degree Name","values":["Master of Science"]},{"key":"thesis:institution_name","label":"Thesis Institution Name","values":["Virginia Polytechnic Institute and State University"]}]},{"id":"language_rights","label":"Language and Rights","entries":[{"key":"dc:language.iso","label":"Language (ISO)","values":["en_US"]},{"key":"dc:rights","label":"Dc Rights","values":["In Copyright"]},{"key":"dc:rights.uri","label":"Rights URI","values":["http://rightsstatements.org/vocab/InC/1.0/"]}]},{"id":"identifiers","label":"Identifiers","entries":[{"key":"dc:identifier.uri","label":"Identifier URI","values":["http://hdl.handle.net/10919/74474"]}]},{"id":"additional","label":"Additional Metadata","entries":[{"key":"dc:description.abstract","label":"Abstract","values":["Procedures for designing and writing a CPU self-test program are developed for microprocessors in general. Specific examples of these procedures are then provided for both a simple example processor and for the Intel 8080; fault coverage statistics are provided for the 8080 test. The self-test methodology overlaps the tests for different elements within the CPU in order to attain a very quick test suitable for periodic background testing. Generalized fault classes are defined for the CPU and methods for sensitizing and detecting these faults are detailed. General procedures and hardware requirements for self-testing the entire microcomputer system within its operating environment are discussed. Fault simulation techniques are also discussed; simulation provides feedback on the effectiveness of a self-test and allows the test to be improved for better coverage and faster execution."]},{"key":"dc:description.degree","label":"Dc Description Degree","values":["Master of Science"]},{"key":"dc:format.mimetype","label":"Dc Format Mimetype","values":["application/pdf"]},{"key":"dc:title","label":"Title","values":["A methodology for self-testing microprocessors"]}]}],"canonical_facts":{"dc:contributor.department":["Electrical Engineering"],"dc:creator":["Haislett, David W."],"dc:date.accessioned":["2017-01-30T21:02:19Z"],"dc:date.available":["2017-01-30T21:02:19Z"],"dc:date.issued":["1982"],"dc:description.abstract":["Procedures for designing and writing a CPU self-test program are developed for microprocessors in general. Specific examples of these procedures are then provided for both a simple example processor and for the Intel 8080; fault coverage statistics are provided for the 8080 test. The self-test methodology overlaps the tests for different elements within the CPU in order to attain a very quick test suitable for periodic background testing. Generalized fault classes are defined for the CPU and methods for sensitizing and detecting these faults are detailed. General procedures and hardware requirements for self-testing the entire microcomputer system within its operating environment are discussed. Fault simulation techniques are also discussed; simulation provides feedback on the effectiveness of a self-test and allows the test to be improved for better coverage and faster execution."],"dc:description.degree":["Master of Science"],"dc:format.mimetype":["application/pdf"],"dc:identifier.uri":["http://hdl.handle.net/10919/74474"],"dc:language.iso":["en_US"],"dc:publisher":["Virginia Polytechnic Institute and State University"],"dc:rights":["In Copyright"],"dc:rights.uri":["http://rightsstatements.org/vocab/InC/1.0/"],"dc:title":["A methodology for self-testing microprocessors"],"dc:type":["Thesis"],"dc:type.dcmitype":["Text"],"thesis:degree_discipline":["Electrical Engineering"],"thesis:degree_level":["masters"],"thesis:degree_name":["Master of Science"],"thesis:institution_name":["Virginia Polytechnic Institute and State University"]},"updated_at":"2026-07-22T22:18:46Z"}