{"id":{"repo_id":"vt","oai_identifier":"oai:vtechworks.lib.vt.edu:10919/50432"},"canonical_url":"https://search.dev.ndltd.org/etd/vt/oai:vtechworks.lib.vt.edu:10919/50432","repository":{"repo_id":"vt","name":"Virginia Tech","base_url":"https://vtechworks.lib.vt.edu/oai/request"},"display":{"title":"Making Radios with GReasy: GNU Radio With FPGAs Made Easy","abstract":"Radio technology is rapidly evolving and as processing capabilities and algorithms become more complex, the need for alternative compilation and user interface abstraction increases. Field Programmable Gate Array (FPGA) technology introduces unique reconfigurable hardware architectures that can aid in software defined radio (SDR) design. FPGAs have greater processing capability than traditional general purpose processors (GPP) found in desktop workstations. This work builds on an ongoing project, GReasy, that augments a Linux based open source SDR development platform, GNU Radio, with FPGA processing capabilities. By delegating processing intensive portions of a radio design to the Xilinx Zynq FPGA architecture, the domain of deployable radios by GNU Radio can be broadened. Xilinx Zynq, integrates the FPGA fabric and CPU onto a single chip, which eliminates the need for a controlling host computer; thus, providing a single, portable, low-power, embedded platform. This thesis presents a Zynq capable version of GNU Radio -- an open-source rapid radio deployment tool -- with an enhanced flow that utilizes the processing capability of FPGAs. This work features TFlow -- an FPGA back-end compilation accelerator for instant FPGA assembly. GReasy generates a description of the hardware components that are used by TFlow for the instant FPGA assembly. Once the FPGA is programmed with a design based on the description generated by GReasy, modules and the target hardware can be parameterized to realize an even larger class of applications and further solidify the concept of rapid assembly of software defined radios.","abstract_html":"Radio technology is rapidly evolving and as processing capabilities and algorithms become more complex, the need for alternative compilation and user interface abstraction increases. Field Programmable Gate Array (FPGA) technology introduces unique reconfigurable hardware architectures that can aid in software defined radio (SDR) design. FPGAs have greater processing capability than traditional general purpose processors (GPP) found in desktop workstations. This work builds on an ongoing project, GReasy, that augments a Linux based open source SDR development platform, GNU Radio, with FPGA processing capabilities. By delegating processing intensive portions of a radio design to the Xilinx Zynq FPGA architecture, the domain of deployable radios by GNU Radio can be broadened. Xilinx Zynq, integrates the FPGA fabric and CPU onto a single chip, which eliminates the need for a controlling host computer; thus, providing a single, portable, low-power, embedded platform. This thesis presents a Zynq capable version of GNU Radio -- an open-source rapid radio deployment tool -- with an enhanced flow that utilizes the processing capability of FPGAs. This work features TFlow -- an FPGA back-end compilation accelerator for instant FPGA assembly. GReasy generates a description of the hardware components that are used by TFlow for the instant FPGA assembly. Once the FPGA is programmed with a design based on the description generated by GReasy, modules and the target hardware can be parameterized to realize an even larger class of applications and further solidify the concept of rapid assembly of software defined radios.","abstract_has_math":false,"creators":["Marlow, Ryan Lane"],"institution":"Virginia Tech","degree_name":"Master of Science","degree_level":"masters","degree_discipline":"Computer Engineering","degree_department":"Electrical and Computer Engineering","school":null,"contributors":[],"advisors":[],"committee_chairs":["Athanas, Peter M."],"committee_members":["Dietrich, Carl B.","Reed, Jeffrey H."],"year":2014,"date_issued":"2014-08-29","date_published":"2014-08-29","updated_at":"2026-07-22T22:20:31Z","subjects":["Field programmable gate arrays","GNU Radio","Software radio","Rapid Assembly","Productivity"],"languages":[],"rights":["In Copyright"],"rights_urls":["http://rightsstatements.org/vocab/InC/1.0/"],"identifier_entries":[{"key":"dc:identifier.other","label":"Dc Identifier Other","values":["vt_gsexam:3641"],"render_values":[{"text":"vt_gsexam:3641","href":null,"code":true}]}]},"links":{"outbound_url":"http://hdl.handle.net/10919/50432","outbound_label":"Handle","outbound_source":"dc:identifier.uri"},"metadata_groups":[{"id":"people","label":"People","entries":[{"key":"dc:contributor.committeechair","label":"Committee Chair","values":["Athanas, Peter M."]},{"key":"dc:contributor.committeemember","label":"Committee Member","values":["Dietrich, Carl B.","Reed, Jeffrey H."]},{"key":"dc:contributor.department","label":"Department","values":["Electrical and Computer Engineering"]},{"key":"dc:creator","label":"Author","values":["Marlow, Ryan Lane"]}]},{"id":"academic_context","label":"Academic Context","entries":[{"key":"dc:date.accessioned","label":"Dc Date Accessioned","values":["2014-08-30T08:00:49Z"]},{"key":"dc:date.available","label":"Dc Date Available","values":["2014-08-30T08:00:49Z"]},{"key":"dc:date.issued","label":"Date","values":["2014-08-29"]},{"key":"dc:publisher","label":"Institution","values":["Virginia Tech"]},{"key":"dc:type","label":"Dc Type","values":["Thesis"]},{"key":"thesis:degree_discipline","label":"Discipline","values":["Computer Engineering"]},{"key":"thesis:degree_level","label":"Degree Level","values":["masters"]},{"key":"thesis:degree_name","label":"Degree Name","values":["Master of Science"]},{"key":"thesis:institution_name","label":"Thesis Institution Name","values":["Virginia Polytechnic Institute and State University"]}]},{"id":"subjects_keywords","label":"Subjects and Keywords","entries":[{"key":"dc:subject","label":"Dc Subject","values":["Field programmable gate arrays","GNU Radio","Software radio","Rapid Assembly","Productivity"]}]},{"id":"language_rights","label":"Language and Rights","entries":[{"key":"dc:rights","label":"Dc Rights","values":["In Copyright"]},{"key":"dc:rights.uri","label":"Rights URI","values":["http://rightsstatements.org/vocab/InC/1.0/"]}]},{"id":"identifiers","label":"Identifiers","entries":[{"key":"dc:identifier.other","label":"Dc Identifier Other","values":["vt_gsexam:3641"]},{"key":"dc:identifier.uri","label":"Identifier URI","values":["http://hdl.handle.net/10919/50432"]}]},{"id":"additional","label":"Additional Metadata","entries":[{"key":"dc:description.abstract","label":"Abstract","values":["Radio technology is rapidly evolving and as processing capabilities and algorithms become more complex, the need for alternative compilation and user interface abstraction increases. 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This work features TFlow -- an FPGA back-end compilation accelerator for instant FPGA assembly. GReasy generates a description of the hardware components that are used by TFlow for the instant FPGA assembly. Once the FPGA is programmed with a design based on the description generated by GReasy, modules and the target hardware can be parameterized to realize an even larger class of applications and further solidify the concept of rapid assembly of software defined radios."]},{"key":"dc:description.degree","label":"Dc Description Degree","values":["Master of Science"]},{"key":"dc:format.medium","label":"Dc Format Medium","values":["ETD"]},{"key":"dc:title","label":"Title","values":["Making Radios with GReasy: GNU Radio With FPGAs Made Easy"]}]}],"canonical_facts":{"dc:contributor.committeechair":["Athanas, Peter M."],"dc:contributor.committeemember":["Dietrich, Carl B.","Reed, Jeffrey H."],"dc:contributor.department":["Electrical and Computer Engineering"],"dc:creator":["Marlow, Ryan Lane"],"dc:date.accessioned":["2014-08-30T08:00:49Z"],"dc:date.available":["2014-08-30T08:00:49Z"],"dc:date.issued":["2014-08-29"],"dc:description.abstract":["Radio technology is rapidly evolving and as processing capabilities and algorithms become more complex, the need for alternative compilation and user interface abstraction increases. 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