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Virginia Tech

Translating Discrete Time SIMULINK to SIGNAL

Abstract

dc:description.abstract

As Cyber Physical Systems (CPS) are getting more complex and safety critical, Model Based Design (MBD), which consists of building formal models of a system in order to be used in verification and correct-by-construction code generation, is becoming a promising methodology for the development of the embedded software of such systems. This design paradigm significantly reduces the development cost and time while guaranteeing better robustness, capability and correctness with respect to the original specifications, when compared with the traditional ad-hoc design methods. SIMULINK has been the most popular tool for embedded control design in research as well as in industry, for the last decades. As SIMULINK does not have formal semantics, the application of the model based design methodology and tools to its models is very limited. In this thesis, we present a semantic translator that transform discrete time SIMULINK models into SIGNAL programs. The choice of SIGNAL is motivated by its polychronous formalism that enhances synchronous programming with asynchronous concurrency, as well as, by the ability of its compiler of generating deterministic multi thread code. Our translation involves three major steps: clock inference, type inference and hierarchical top-down translation. We validate the semantic preservation of our prototype tool by testing it on different SIMULINK models.

Degree

thesis:*
Name thesis:degree_name
Master of Science
Level thesis:degree_level
masters
Discipline thesis:degree_discipline
Computer Engineering
Department dc:contributor.department
Electrical and Computer Engineering
Grantor dc:publisher
Virginia Tech
Year dc:date.issued
2014

Author and committee

dc:creator, dc:contributor.*
Author dc:creator
  • Messaoud, Safa
Chair dc:contributor.committeechair
  • Shukla, Sandeep K.
Committee members dc:contributor.committeemember
  • Hsiao, Michael S.
  • Paul, JoAnn M.

Subjects

dc:subject × 4

Rights

dc:rights
Statement dc:rights
  • In Copyright

Identifiers

dc:identifier.*
Dc Identifier Other
vt_gsexam:3379
OAI identifier oai:identifier
oai:vtechworks.lib.vt.edu:10919/49299

Chain of custody

source
Harvested from
Virginia Tech
Base URL
vtechworks.lib.vt.edu/oai/request
Last updated
2026-07-22
Source record
OAI-PMH GetRecord
citation

Messaoud, Safa. Translating Discrete Time SIMULINK to SIGNAL. masters thesis, Virginia Tech, 2014. http://hdl.handle.net/10919/49299