{"id":{"repo_id":"vt","oai_identifier":"oai:vtechworks.lib.vt.edu:10919/45485"},"canonical_url":"https://search.dev.ndltd.org/etd/vt/oai:vtechworks.lib.vt.edu:10919/45485","repository":{"repo_id":"vt","name":"Virginia Tech","base_url":"https://vtechworks.lib.vt.edu/oai/request"},"display":{"title":"Controlled on-time power factor correction circuit with input filter","abstract":"An active power factor correction circuit with controlled on-time is proposed. The circuit has a simpler control scheme than the power bc10r correction circuit with hysteresis control, and yet is able to attain high power factor. A very important aspect of this work was the formulation of the design guidelines for the input filter for the power factor correction circuit. Conventional methods of filter design may introduce an unwanted phase shift between the input voltage and current, thereby degrading the power factor. The cause of this phase shift is explained and based upon it, the design guidelines for the input filter are established. The FFT is used to more accurately define the input filter attenuation requirement. A comparison is made between power factor correction circuit with controlled on-time and the power factor correction circuit with hysteresis control (with input filter for both of them) on the basis of their minimum weight. A regulated 100 W, 120 VAC input and 300 V output power factor correction circuit was implemented on a breadboard. Ridley's small signal switch model [10] for the power factor correction circuit with hysteresis control is successful1y app1ied to this control scheme to close the loop.","abstract_html":"An active power factor correction circuit with controlled on-time is proposed. The circuit has a simpler control scheme than the power bc10r correction circuit with hysteresis control, and yet is able to attain high power factor. A very important aspect of this work was the formulation of the design guidelines for the input filter for the power factor correction circuit. Conventional methods of filter design may introduce an unwanted phase shift between the input voltage and current, thereby degrading the power factor. The cause of this phase shift is explained and based upon it, the design guidelines for the input filter are established. The FFT is used to more accurately define the input filter attenuation requirement. A comparison is made between power factor correction circuit with controlled on-time and the power factor correction circuit with hysteresis control (with input filter for both of them) on the basis of their minimum weight. A regulated 100 W, 120 VAC input and 300 V output power factor correction circuit was implemented on a breadboard. Ridley&#x27;s small signal switch model [10] for the power factor correction circuit with hysteresis control is successful1y app1ied to this control scheme to close the loop.","abstract_has_math":false,"creators":["Ahmed, Saeed"],"institution":"Virginia Tech","degree_name":"Master of Science","degree_level":"masters","degree_discipline":"Electrical Engineering","degree_department":"Electrical Engineering","school":null,"contributors":[],"advisors":[],"committee_chairs":["Lee, Fred C."],"committee_members":["Cho, Bo H.","Vorperian, Vatche"],"year":1990,"date_issued":"1990-05-03","date_published":"1990-05-03","updated_at":"2026-07-22T22:18:50Z","subjects":[],"languages":["en"],"rights":["In Copyright"],"rights_urls":["http://rightsstatements.org/vocab/InC/1.0/"],"identifier_entries":[{"key":"dc:identifier.other","label":"Dc Identifier Other","values":["etd-11072008-063637"],"render_values":[{"text":"etd-11072008-063637","href":null,"code":true}]}]},"links":{"outbound_url":"http://hdl.handle.net/10919/45485","outbound_label":"Handle","outbound_source":"dc:identifier.uri"},"metadata_groups":[{"id":"people","label":"People","entries":[{"key":"dc:contributor.committeechair","label":"Committee Chair","values":["Lee, Fred C."]},{"key":"dc:contributor.committeemember","label":"Committee Member","values":["Cho, Bo H.","Vorperian, Vatche"]},{"key":"dc:contributor.department","label":"Department","values":["Electrical Engineering"]},{"key":"dc:creator","label":"Author","values":["Ahmed, Saeed"]}]},{"id":"academic_context","label":"Academic Context","entries":[{"key":"dc:date.accessioned","label":"Dc Date Accessioned","values":["2014-03-14T21:49:07Z"]},{"key":"dc:date.available","label":"Dc Date Available","values":["2014-03-14T21:49:07Z","2008-11-07"]},{"key":"dc:date.issued","label":"Date","values":["1990-05-03"]},{"key":"dc:publisher","label":"Institution","values":["Virginia Tech"]},{"key":"dc:type","label":"Dc Type","values":["Thesis"]},{"key":"dc:type.dcmitype","label":"Dc Type Dcmitype","values":["Text"]},{"key":"thesis:degree_discipline","label":"Discipline","values":["Electrical Engineering"]},{"key":"thesis:degree_level","label":"Degree Level","values":["masters"]},{"key":"thesis:degree_name","label":"Degree Name","values":["Master of Science"]},{"key":"thesis:institution_name","label":"Thesis Institution Name","values":["Virginia Polytechnic Institute and State University"]}]},{"id":"language_rights","label":"Language and Rights","entries":[{"key":"dc:language.iso","label":"Language (ISO)","values":["en"]},{"key":"dc:rights","label":"Dc Rights","values":["In Copyright"]},{"key":"dc:rights.uri","label":"Rights URI","values":["http://rightsstatements.org/vocab/InC/1.0/"]}]},{"id":"identifiers","label":"Identifiers","entries":[{"key":"dc:identifier.other","label":"Dc Identifier Other","values":["etd-11072008-063637"]},{"key":"dc:identifier.uri","label":"Identifier URI","values":["http://hdl.handle.net/10919/45485"]}]},{"id":"additional","label":"Additional Metadata","entries":[{"key":"dc:description.abstract","label":"Abstract","values":["An active power factor correction circuit with controlled on-time is proposed. The circuit has a simpler control scheme than the power bc10r correction circuit with hysteresis control, and yet is able to attain high power factor. A very important aspect of this work was the formulation of the design guidelines for the input filter for the power factor correction circuit. Conventional methods of filter design may introduce an unwanted phase shift between the input voltage and current, thereby degrading the power factor. The cause of this phase shift is explained and based upon it, the design guidelines for the input filter are established. The FFT is used to more accurately define the input filter attenuation requirement. A comparison is made between power factor correction circuit with controlled on-time and the power factor correction circuit with hysteresis control (with input filter for both of them) on the basis of their minimum weight. A regulated 100 W, 120 VAC input and 300 V output power factor correction circuit was implemented on a breadboard. Ridley's small signal switch model [10] for the power factor correction circuit with hysteresis control is successful1y app1ied to this control scheme to close the loop."]},{"key":"dc:description.degree","label":"Dc Description Degree","values":["Master of Science"]},{"key":"dc:format.medium","label":"Dc Format Medium","values":["BTD"]},{"key":"dc:format.mimetype","label":"Dc Format Mimetype","values":["application/pdf"]},{"key":"dc:title","label":"Title","values":["Controlled on-time power factor correction circuit with input filter"]}]}],"canonical_facts":{"dc:contributor.committeechair":["Lee, Fred C."],"dc:contributor.committeemember":["Cho, Bo H.","Vorperian, Vatche"],"dc:contributor.department":["Electrical Engineering"],"dc:creator":["Ahmed, Saeed"],"dc:date.accessioned":["2014-03-14T21:49:07Z"],"dc:date.available":["2014-03-14T21:49:07Z","2008-11-07"],"dc:date.issued":["1990-05-03"],"dc:description.abstract":["An active power factor correction circuit with controlled on-time is proposed. The circuit has a simpler control scheme than the power bc10r correction circuit with hysteresis control, and yet is able to attain high power factor. A very important aspect of this work was the formulation of the design guidelines for the input filter for the power factor correction circuit. Conventional methods of filter design may introduce an unwanted phase shift between the input voltage and current, thereby degrading the power factor. The cause of this phase shift is explained and based upon it, the design guidelines for the input filter are established. The FFT is used to more accurately define the input filter attenuation requirement. A comparison is made between power factor correction circuit with controlled on-time and the power factor correction circuit with hysteresis control (with input filter for both of them) on the basis of their minimum weight. A regulated 100 W, 120 VAC input and 300 V output power factor correction circuit was implemented on a breadboard. Ridley's small signal switch model [10] for the power factor correction circuit with hysteresis control is successful1y app1ied to this control scheme to close the loop."],"dc:description.degree":["Master of Science"],"dc:format.medium":["BTD"],"dc:format.mimetype":["application/pdf"],"dc:identifier.other":["etd-11072008-063637"],"dc:identifier.uri":["http://hdl.handle.net/10919/45485"],"dc:language.iso":["en"],"dc:publisher":["Virginia Tech"],"dc:rights":["In Copyright"],"dc:rights.uri":["http://rightsstatements.org/vocab/InC/1.0/"],"dc:title":["Controlled on-time power factor correction circuit with input filter"],"dc:type":["Thesis"],"dc:type.dcmitype":["Text"],"thesis:degree_discipline":["Electrical Engineering"],"thesis:degree_level":["masters"],"thesis:degree_name":["Master of Science"],"thesis:institution_name":["Virginia Polytechnic Institute and State University"]},"updated_at":"2026-07-22T22:18:50Z"}