{"id":{"repo_id":"vt","oai_identifier":"oai:vtechworks.lib.vt.edu:10919/44576"},"canonical_url":"https://search.dev.ndltd.org/etd/vt/oai:vtechworks.lib.vt.edu:10919/44576","repository":{"repo_id":"vt","name":"Virginia Tech","base_url":"https://vtechworks.lib.vt.edu/oai/request"},"display":{"title":"A model for end-to-end delay in distributed computer systems","abstract":"Mitchell [1,2] describes end-to-end performance for a LAN-based computer system as the total system throughput and delay for a single-thread transaction. This model is used for a variety of applications. The single-thread transaction might, for example, be a remote database update or a real-time control activity. To model end-to-end performance, one must include the host computers, the network interface units (NIUs), the host-NIU links, and the NIU-NIU links. Based on Jackson's Theorem, total delay for single-thread transaction traversing a computer network can be approximated by the sum of delays in the host computers, the network interface units, the host-NIU links, and the NIU-NIU links. The host computer performance model can be refined by applying execution path analysis. Execution path analysis examines the structure of each software routine to be executed and provides an expression of time delay as a function of probabilities associated with conditional branches and a function of data input size. Spreadsheet models provide quick and convenient solutions for purposes of performing computer system tuning and capacity planning as demonstrated by Thomas [10]. This thesis paper extends the typical modeling approach by providing more detailed analysis of host computer delay, more specifically, the execution path analysis. In addition, spreadsheet models are implemented to demonstrate the execution path analysis and to provide comparisons with previously implemented models.","abstract_html":"Mitchell [1,2] describes end-to-end performance for a LAN-based computer system as the total system throughput and delay for a single-thread transaction. This model is used for a variety of applications. The single-thread transaction might, for example, be a remote database update or a real-time control activity. To model end-to-end performance, one must include the host computers, the network interface units (NIUs), the host-NIU links, and the NIU-NIU links. Based on Jackson's Theorem, total delay for single-thread transaction traversing a computer network can be approximated by the sum of delays in the host computers, the network interface units, the host-NIU links, and the NIU-NIU links. The host computer performance model can be refined by applying execution path analysis. Execution path analysis examines the structure of each software routine to be executed and provides an expression of time delay as a function of probabilities associated with conditional branches and a function of data input size. Spreadsheet models provide quick and convenient solutions for purposes of performing computer system tuning and capacity planning as demonstrated by Thomas [10]. This thesis paper extends the typical modeling approach by providing more detailed analysis of host computer delay, more specifically, the execution path analysis. In addition, spreadsheet models are implemented to demonstrate the execution path analysis and to provide comparisons with previously implemented models.","abstract_has_math":false,"creators":["Deeds, John J."],"institution":"Virginia Tech","degree_name":"Master of Science","degree_level":"masters","degree_discipline":"Electrical Engineering","degree_department":"Electrical Engineering","school":null,"contributors":[],"advisors":[],"committee_chairs":["Ricci, Fred J."],"committee_members":["Schaefer, Daniel J.","Kossakes, George C."],"year":1993,"date_issued":"1993-05-15","date_published":"1993-05-15","updated_at":"2026-07-22T22:19:32Z","subjects":[],"languages":["en"],"rights":["In Copyright"],"rights_urls":["http://rightsstatements.org/vocab/InC/1.0/"],"identifier_entries":[{"key":"dc:identifier.other","label":"Dc Identifier Other","values":["etd-09052009-040608"],"render_values":[{"text":"etd-09052009-040608","href":null,"code":true}]}]},"links":{"outbound_url":"http://hdl.handle.net/10919/44576","outbound_label":"Handle","outbound_source":"dc:identifier.uri"},"metadata_groups":[{"id":"people","label":"People","entries":[{"key":"dc:contributor.committeechair","label":"Committee Chair","values":["Ricci, Fred J."]},{"key":"dc:contributor.committeemember","label":"Committee Member","values":["Schaefer, Daniel J.","Kossakes, George C."]},{"key":"dc:contributor.department","label":"Department","values":["Electrical Engineering"]},{"key":"dc:creator","label":"Author","values":["Deeds, John J."]}]},{"id":"academic_context","label":"Academic Context","entries":[{"key":"dc:date.accessioned","label":"Dc Date Accessioned","values":["2014-03-14T21:44:39Z"]},{"key":"dc:date.available","label":"Dc Date Available","values":["2014-03-14T21:44:39Z","2009-09-05"]},{"key":"dc:date.issued","label":"Date","values":["1993-05-15"]},{"key":"dc:publisher","label":"Institution","values":["Virginia Tech"]},{"key":"dc:type","label":"Dc Type","values":["Thesis"]},{"key":"dc:type.dcmitype","label":"Dc Type Dcmitype","values":["Text"]},{"key":"thesis:degree_discipline","label":"Discipline","values":["Electrical Engineering"]},{"key":"thesis:degree_level","label":"Degree Level","values":["masters"]},{"key":"thesis:degree_name","label":"Degree Name","values":["Master of Science"]},{"key":"thesis:institution_name","label":"Thesis Institution Name","values":["Virginia Polytechnic Institute and State University"]}]},{"id":"language_rights","label":"Language and Rights","entries":[{"key":"dc:language.iso","label":"Language (ISO)","values":["en"]},{"key":"dc:rights","label":"Dc Rights","values":["In Copyright"]},{"key":"dc:rights.uri","label":"Rights URI","values":["http://rightsstatements.org/vocab/InC/1.0/"]}]},{"id":"identifiers","label":"Identifiers","entries":[{"key":"dc:identifier.other","label":"Dc Identifier Other","values":["etd-09052009-040608"]},{"key":"dc:identifier.uri","label":"Identifier URI","values":["http://hdl.handle.net/10919/44576"]}]},{"id":"additional","label":"Additional Metadata","entries":[{"key":"dc:description.abstract","label":"Abstract","values":["Mitchell [1,2] describes end-to-end performance for a LAN-based computer system as the total system throughput and delay for a single-thread transaction. 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Spreadsheet models provide quick and convenient solutions for purposes of performing computer system tuning and capacity planning as demonstrated by Thomas [10]. This thesis paper extends the typical modeling approach by providing more detailed analysis of host computer delay, more specifically, the execution path analysis. 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