Analysis, simulation and modeling of three-level VSIs

Analysis of three-phase, three-level VSIs is done for high-power high-voltage applications. Complete Space Vector Modulation (SVM) algorithm is developed for a three-phase, three-level converter. Special attention is given to minimization of output ripple and voltage balance of the dc-link input capacitors. Verification of the proposed SVM algorithm is done by computer simulation. Comprehensive small-signal modeling of the three-level converter with a resistive load is developed the first time. Steady-state solutions reveal that the voltage across dc-link input capacitors is constant at the half of the dc-link voltage.

Name thesis:degree_name

Master of Science

Level thesis:degree_level

masters

Discipline thesis:degree_discipline

Electrical Engineering

Department dc:contributor.department

Electrical Engineering

Grantor dc:publisher

Virginia Tech

Year dc:date.issued

1997

Author dc:creator

• Cosan, Muhammet

Chair dc:contributor.committeechair

• Boroyevich, Dushan

Committee members dc:contributor.committeemember

• Lee, Fred C.
• Lai, Jih-Sheng

• three-level converter

Statement dc:rights

• In Copyright

Licence dc:rights.uri

• http://rightsstatements.org/vocab/InC/1.0/

Language dc:language.iso

en

Dc Identifier Other

etd-08222008-063802

OAI identifier oai:identifier

oai:vtechworks.lib.vt.edu:10919/44365