{"id":{"repo_id":"vt","oai_identifier":"oai:vtechworks.lib.vt.edu:10919/44000"},"canonical_url":"https://search.dev.ndltd.org/etd/vt/oai:vtechworks.lib.vt.edu:10919/44000","repository":{"repo_id":"vt","name":"Virginia Tech","base_url":"https://vtechworks.lib.vt.edu/oai/request"},"display":{"title":"Performance analysis of partitioned multistage cube network and adaptive routed single-stage cube network","abstract":"Parallel processing has emerged to meet today's high demand of computationally intensive applications. In a parallel processing machine, the interconnection network is a major factor affecting the machine’s overall performance in terms of speed and versatility. This research presents an analysis of the partitioned multistage cube network (MSC) and the adaptive routed single-stage cube network (Cube). The parallel processing system with a partitioned MSC provides computing power for sub-users more conveniently and performs faster than the same system with randomly subdivided processing elements. The performances of input partitioned MSC and output partitioned MSC are analyzed by simulation. These figures are then compared to the performance figures of the MSC with randomly grouped processing elements. A Cube with an adaptive routing algorithm provides a faster and more fault-tolerant information transmission medium for a parallel processing system compared to a Cube with a static routing algorithm. The simulated performance results of the adaptive routed Cube and the static routed Cube are compared. The analysis is done assuming packet switched scheme with a concentration on network throughput. A description of the investigation, assumptions and factors used for the study, and the results of the simulation analysis are included.","abstract_html":"Parallel processing has emerged to meet today's high demand of computationally intensive applications. In a parallel processing machine, the interconnection network is a major factor affecting the machine’s overall performance in terms of speed and versatility. This research presents an analysis of the partitioned multistage cube network (MSC) and the adaptive routed single-stage cube network (Cube). The parallel processing system with a partitioned MSC provides computing power for sub-users more conveniently and performs faster than the same system with randomly subdivided processing elements. The performances of input partitioned MSC and output partitioned MSC are analyzed by simulation. These figures are then compared to the performance figures of the MSC with randomly grouped processing elements. A Cube with an adaptive routing algorithm provides a faster and more fault-tolerant information transmission medium for a parallel processing system compared to a Cube with a static routing algorithm. The simulated performance results of the adaptive routed Cube and the static routed Cube are compared. The analysis is done assuming packet switched scheme with a concentration on network throughput. A description of the investigation, assumptions and factors used for the study, and the results of the simulation analysis are included.","abstract_has_math":false,"creators":["Park, Jahng S."],"institution":"Virginia Tech","degree_name":"Master of Science","degree_level":"masters","degree_discipline":"Electrical Engineering","degree_department":"Electrical Engineering","school":null,"contributors":[],"advisors":[],"committee_chairs":[],"committee_members":[],"year":1994,"date_issued":"1994","date_published":"1994","updated_at":"2026-07-22T22:19:32Z","subjects":[],"languages":["en"],"rights":["In Copyright"],"rights_urls":["http://rightsstatements.org/vocab/InC/1.0/"],"identifier_entries":[{"key":"dc:identifier.other","label":"Dc Identifier Other","values":["etd-07292009-090453"],"render_values":[{"text":"etd-07292009-090453","href":null,"code":true}]}]},"links":{"outbound_url":"http://hdl.handle.net/10919/44000","outbound_label":"Handle","outbound_source":"dc:identifier.uri"},"metadata_groups":[{"id":"people","label":"People","entries":[{"key":"dc:contributor.department","label":"Department","values":["Electrical Engineering"]},{"key":"dc:creator","label":"Author","values":["Park, Jahng S."]}]},{"id":"academic_context","label":"Academic Context","entries":[{"key":"dc:date.accessioned","label":"Dc Date Accessioned","values":["2014-03-14T21:41:37Z"]},{"key":"dc:date.available","label":"Dc Date Available","values":["2014-03-14T21:41:37Z","2009-07-29"]},{"key":"dc:date.issued","label":"Date","values":["1994"]},{"key":"dc:publisher","label":"Institution","values":["Virginia Tech"]},{"key":"dc:type","label":"Dc Type","values":["Thesis"]},{"key":"dc:type.dcmitype","label":"Dc Type Dcmitype","values":["Text"]},{"key":"thesis:degree_discipline","label":"Discipline","values":["Electrical Engineering"]},{"key":"thesis:degree_level","label":"Degree Level","values":["masters"]},{"key":"thesis:degree_name","label":"Degree Name","values":["Master of Science"]},{"key":"thesis:institution_name","label":"Thesis Institution Name","values":["Virginia Polytechnic Institute and State University"]}]},{"id":"language_rights","label":"Language and Rights","entries":[{"key":"dc:language.iso","label":"Language (ISO)","values":["en"]},{"key":"dc:rights","label":"Dc Rights","values":["In Copyright"]},{"key":"dc:rights.uri","label":"Rights URI","values":["http://rightsstatements.org/vocab/InC/1.0/"]}]},{"id":"identifiers","label":"Identifiers","entries":[{"key":"dc:identifier.other","label":"Dc Identifier Other","values":["etd-07292009-090453"]},{"key":"dc:identifier.uri","label":"Identifier URI","values":["http://hdl.handle.net/10919/44000"]}]},{"id":"additional","label":"Additional Metadata","entries":[{"key":"dc:description.abstract","label":"Abstract","values":["Parallel processing has emerged to meet today's high demand of computationally intensive applications. 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The simulated performance results of the adaptive routed Cube and the static routed Cube are compared. The analysis is done assuming packet switched scheme with a concentration on network throughput. A description of the investigation, assumptions and factors used for the study, and the results of the simulation analysis are included."]},{"key":"dc:description.degree","label":"Dc Description Degree","values":["Master of Science"]},{"key":"dc:format.medium","label":"Dc Format Medium","values":["BTD"]},{"key":"dc:format.mimetype","label":"Dc Format Mimetype","values":["application/pdf"]},{"key":"dc:title","label":"Title","values":["Performance analysis of partitioned multistage cube network and adaptive routed single-stage cube network"]}]}],"canonical_facts":{"dc:contributor.department":["Electrical Engineering"],"dc:creator":["Park, Jahng S."],"dc:date.accessioned":["2014-03-14T21:41:37Z"],"dc:date.available":["2014-03-14T21:41:37Z","2009-07-29"],"dc:date.issued":["1994"],"dc:description.abstract":["Parallel processing has emerged to meet today's high demand of computationally intensive applications. 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