{"id":{"repo_id":"vt","oai_identifier":"oai:vtechworks.lib.vt.edu:10919/41520"},"canonical_url":"https://search.dev.ndltd.org/etd/vt/oai:vtechworks.lib.vt.edu:10919/41520","repository":{"repo_id":"vt","name":"Virginia Tech","base_url":"https://vtechworks.lib.vt.edu/oai/request"},"display":{"title":"Optimization of surface preparation technique for unipolar silicon direct bonding","abstract":"A special wafer bonding method called the Silicon Direct Bonding technique is used to study the bonding of unipolar (n-type, <100> oriented) silicon wafers. The primary objective of this thesis project is to find an optimum surface preparation technique for subsequent silicon wafer bonding. Wafer cleaning and treatment methods are investigated to understand the correlation between a high quality wafer surface and the resulting high quality electrical conduction at the interface. Accordingly, in this project, a preference for hydrophobic (less polar Si-OH surface) wafers is given to ensure a minimized amount of oxide layer on the surface. Several key factors that govern the quality of the wafer surfaces, such as the degree of hydrophobicity, HF etching time, composition of HF etching solution and Dr water rinse, are examined with ellipsometric and XPS measurements. An HF etching followed by a sputter etching has been selected to pre-treat the wafer surfaces for bonding. A maximum allowable air exposure time (35 second) is also found which would allow bonding without significant re-growth of the oxide layer. Bonding is performed under vacuum with a special mechanical fixture and the resulting structures from a subsequent heat treatment process are examined with crack propagation testing. Bond strength after annealing is sufficient to withstand a pull test, however, with a 3 point bend testing, the crack propagated horizontally at the interface.","abstract_html":"A special wafer bonding method called the Silicon Direct Bonding technique is used to study the bonding of unipolar (n-type, &lt;100&gt; oriented) silicon wafers. The primary objective of this thesis project is to find an optimum surface preparation technique for subsequent silicon wafer bonding. Wafer cleaning and treatment methods are investigated to understand the correlation between a high quality wafer surface and the resulting high quality electrical conduction at the interface. Accordingly, in this project, a preference for hydrophobic (less polar Si-OH surface) wafers is given to ensure a minimized amount of oxide layer on the surface. Several key factors that govern the quality of the wafer surfaces, such as the degree of hydrophobicity, HF etching time, composition of HF etching solution and Dr water rinse, are examined with ellipsometric and XPS measurements. An HF etching followed by a sputter etching has been selected to pre-treat the wafer surfaces for bonding. A maximum allowable air exposure time (35 second) is also found which would allow bonding without significant re-growth of the oxide layer. Bonding is performed under vacuum with a special mechanical fixture and the resulting structures from a subsequent heat treatment process are examined with crack propagation testing. Bond strength after annealing is sufficient to withstand a pull test, however, with a 3 point bend testing, the crack propagated horizontally at the interface.","abstract_has_math":false,"creators":["Haque, Ashim Shatil"],"institution":"Virginia Tech","degree_name":"Master of Science","degree_level":"masters","degree_discipline":"Electrical Engineering","degree_department":"Electrical Engineering","school":null,"contributors":[],"advisors":[],"committee_chairs":["Moore, Daniel J."],"committee_members":["Elshabini-Riad, Aicha A.","Desu, Seshu B."],"year":1993,"date_issued":"1993-12-05","date_published":"1993-12-05","updated_at":"2026-07-22T22:19:47Z","subjects":[],"languages":["en"],"rights":["In Copyright"],"rights_urls":["http://rightsstatements.org/vocab/InC/1.0/"],"identifier_entries":[{"key":"dc:identifier.other","label":"Dc Identifier Other","values":["etd-03122009-041754"],"render_values":[{"text":"etd-03122009-041754","href":null,"code":true}]}]},"links":{"outbound_url":"http://hdl.handle.net/10919/41520","outbound_label":"Handle","outbound_source":"dc:identifier.uri"},"metadata_groups":[{"id":"people","label":"People","entries":[{"key":"dc:contributor.committeechair","label":"Committee Chair","values":["Moore, Daniel J."]},{"key":"dc:contributor.committeemember","label":"Committee Member","values":["Elshabini-Riad, Aicha A.","Desu, Seshu B."]},{"key":"dc:contributor.department","label":"Department","values":["Electrical Engineering"]},{"key":"dc:creator","label":"Author","values":["Haque, Ashim Shatil"]}]},{"id":"academic_context","label":"Academic Context","entries":[{"key":"dc:date.accessioned","label":"Dc Date Accessioned","values":["2014-03-14T21:31:26Z"]},{"key":"dc:date.available","label":"Dc Date Available","values":["2014-03-14T21:31:26Z","2009-03-12"]},{"key":"dc:date.issued","label":"Date","values":["1993-12-05"]},{"key":"dc:publisher","label":"Institution","values":["Virginia Tech"]},{"key":"dc:type","label":"Dc Type","values":["Thesis"]},{"key":"dc:type.dcmitype","label":"Dc Type Dcmitype","values":["Text"]},{"key":"thesis:degree_discipline","label":"Discipline","values":["Electrical Engineering"]},{"key":"thesis:degree_level","label":"Degree Level","values":["masters"]},{"key":"thesis:degree_name","label":"Degree Name","values":["Master of Science"]},{"key":"thesis:institution_name","label":"Thesis Institution Name","values":["Virginia Polytechnic Institute and State University"]}]},{"id":"language_rights","label":"Language and Rights","entries":[{"key":"dc:language.iso","label":"Language (ISO)","values":["en"]},{"key":"dc:rights","label":"Dc Rights","values":["In Copyright"]},{"key":"dc:rights.uri","label":"Rights URI","values":["http://rightsstatements.org/vocab/InC/1.0/"]}]},{"id":"identifiers","label":"Identifiers","entries":[{"key":"dc:identifier.other","label":"Dc Identifier Other","values":["etd-03122009-041754"]},{"key":"dc:identifier.uri","label":"Identifier URI","values":["http://hdl.handle.net/10919/41520"]}]},{"id":"additional","label":"Additional Metadata","entries":[{"key":"dc:description.abstract","label":"Abstract","values":["A special wafer bonding method called the Silicon Direct Bonding technique is used to study the bonding of unipolar (n-type, <100> oriented) silicon wafers. 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Bonding is performed under vacuum with a special mechanical fixture and the resulting structures from a subsequent heat treatment process are examined with crack propagation testing. Bond strength after annealing is sufficient to withstand a pull test, however, with a 3 point bend testing, the crack propagated horizontally at the interface."]},{"key":"dc:description.degree","label":"Dc Description Degree","values":["Master of Science"]},{"key":"dc:format.medium","label":"Dc Format Medium","values":["BTD"]},{"key":"dc:format.mimetype","label":"Dc Format Mimetype","values":["application/pdf"]},{"key":"dc:title","label":"Title","values":["Optimization of surface preparation technique for unipolar silicon direct bonding"]}]}],"canonical_facts":{"dc:contributor.committeechair":["Moore, Daniel J."],"dc:contributor.committeemember":["Elshabini-Riad, Aicha A.","Desu, Seshu B."],"dc:contributor.department":["Electrical Engineering"],"dc:creator":["Haque, Ashim Shatil"],"dc:date.accessioned":["2014-03-14T21:31:26Z"],"dc:date.available":["2014-03-14T21:31:26Z","2009-03-12"],"dc:date.issued":["1993-12-05"],"dc:description.abstract":["A special wafer bonding method called the Silicon Direct Bonding technique is used to study the bonding of unipolar (n-type, <100> oriented) silicon wafers. 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