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Virginia Tech

Design and Analysis of a Low-Power Low-Voltage Quadrature LO Generation Circuit for Wireless Applications

Abstract

dc:description.abstract

The competitive market of wireless communication devices demands low power and low cost RF solutions. A quadrature local oscillator (LO) is an essential building block for most transceivers. As the CMOS technology scales deeper into the nanometer regime, design of a low-power low-voltage quadrature LO still poses a challenge for RF designers. This dissertation investigates a new quadrature LO topology featuring a transformer-based voltage controlled oscillator (VCO) stacked with a divide-by-two for low-power low-voltage wireless applications. The transformer-based VCO core adopts the Armstrong VCO configuration to mitigate the small voltage headroom and the noise coupling. The LO operating conditions, including the start-up condition, the oscillation frequency, the voltage swing and the current consumption are derived based upon a linearized small-signal model. Both linear time-invariant (LTI) and linear time-variant (LTV) models are utilized to analyze the phase noise of the proposed LO. The results indicate that the quality factor of the primary coil and the mutual inductance between the primary and the secondary coils play an important role in the trade-off between power and noise. The guidelines for determining the parameters of a transformer are developed. The proposed LO was fabricated in 65 nm CMOS technology and its die size is about 0.28 mm2. The measurement results show that the LO can work at 1 V supply voltage, and its operation is robust to process and temperature variations. In high linearity mode, the LO consumes about 2.6 mW of power typically, and the measured phase noise is -140.3 dBc/Hz at 10 MHz offset frequency. The LO frequency is tunable from 1.35 GHz to 1.75 GHz through a combination of a varactor and an 8-bit switched capacitor bank. The proposed LO compares favorably to the existing reported LOs in terms of the figure of merit (FoM). More importantly, high start-up gain, low power consumption and low voltage operation are achieved simultaneously in the proposed topology. However, it also leads to higher design complexity. The contributions of this work can be summarized as 1) proposal of a new quadrature LO topology that is suitable for low-power low-voltage wireless applications, 2) an in-depth circuit analysis as well as design method development, 3) implementation of a fully integrated LO in 65 nm CMOS technology for GPS applications, 4) demonstration of high performance for the design through measurement results. The possible future improvements include the transformer optimization and the method of circuit analysis.

Degree

thesis:*
Name thesis:degree_name
Ph. D.
Level thesis:degree_level
doctoral
Discipline thesis:degree_discipline
Electrical and Computer Engineering
Department dc:contributor.department
Electrical and Computer Engineering
Grantor dc:publisher
Virginia Tech
Year dc:date.issued
2012

Author and committee

dc:creator, dc:contributor.*
Author dc:creator
  • Wang, Shen
Chair dc:contributor.committeechair
  • Ha, Dong Sam
Committee members dc:contributor.committeemember
  • Lockhart, Thurmon E.
  • Tront, Joseph G.
  • Manteghi, Majid
  • Koh, Kwang Jin

Subjects

dc:subject × 5

Rights

dc:rights
Statement dc:rights
  • In Copyright

Identifiers

dc:identifier.*
Dc Identifier Other
etd-09042012-122605
OAI identifier oai:identifier
oai:vtechworks.lib.vt.edu:10919/39301

Chain of custody

source
Harvested from
Virginia Tech
Base URL
vtechworks.lib.vt.edu/oai/request
Last updated
2026-07-22
Source record
OAI-PMH GetRecord
citation

Wang, Shen. Design and Analysis of a Low-Power Low-Voltage Quadrature LO Generation Circuit for Wireless Applications. doctoral thesis, Virginia Tech, 2012. http://hdl.handle.net/10919/39301