Hierarchical test generation for CMOS circuits

As advances in very large scale integration (VLSI) technology lead to higher levels of circuit integration and new design styles and fabrication processes, traditional test generation techniques fail to adequately address the problems of how to (l) accurately represent the structure of design styles and physical faults, and (2) manage the high computational costs and memory resource requirements caused by the complexity of VLSI. This research investigates a modular, hierarchical approach to test generation for combinational complementary metal oxide semiconductor (CMOS) circuits that effectively deals with these issues. Circuits are modeled using multi-level descriptions to handle large circuit sizes while maintaining an effective balance between accuracy and complexity. Object-oriented analysis and design techniques are used in the development of a hierarchical test generation application implemented using C++. In doing this, the primary objectives were to produce a easily maintainable system, provide an extensible framework for test generation supporting the straightforward incorporation of new types of circuit primitives and faults, and retain the same level of computational efficiency that can be achieved using a procedural language such as C. Characteristics of the object-oriented hierarchical test generation application, such as expandability and run-time efficiency, are compared to those of a standard gate-level test generation program implemented using C and a procedural design approach.

Name thesis:degree_name

Ph. D.

Level thesis:degree_level

doctoral

Discipline thesis:degree_discipline

Electrical Engineering

Department dc:contributor.department

Electrical Engineering

Grantor dc:publisher

Virginia Tech

Year dc:date.issued

1992

Author dc:creator

• Bollinger, S. Wayne

Chair dc:contributor.committeechair

• Midkiff, Scott F.

Committee members dc:contributor.committeemember

• Armstrong, James R.
• Gray, Festus Gail
• Kafura, Dennis G.
• Tront, Joseph G.

Statement dc:rights

• In Copyright

Licence dc:rights.uri

• http://rightsstatements.org/vocab/InC/1.0/

Language dc:language.iso

en

Dc Identifier Other

etd-07282008-134708

OAI identifier oai:identifier

oai:vtechworks.lib.vt.edu:10919/38899