{"id":{"repo_id":"vt","oai_identifier":"oai:vtechworks.lib.vt.edu:10919/36983"},"canonical_url":"https://search.dev.ndltd.org/etd/vt/oai:vtechworks.lib.vt.edu:10919/36983","repository":{"repo_id":"vt","name":"Virginia Tech","base_url":"https://vtechworks.lib.vt.edu/oai/request"},"display":{"title":"An FPGA-Based Multiuser Receiver Employing Parallel Interference Cancellation","abstract":"Research efforts have shown that capacity in a DS/CDMA cellular system can be increased through the use of digital signal processing techniques that exploit the nature of the multiple access interference (MAI). By jointly demodulating the users in the system, this interference can be characterized and reduced thus decreasing the overall probability of error in the system. Numerous multiuser structures exist, each with varying degrees of complexity and performance. However, the size and complexity of these structures is large relative to a conventional receiver. This effort demonstrates a practical approach to implementing parallel interference cancellation applied to DBPSK DS/CDMA on an FPGA-based configurable computing platform. The system presented acquires, tracks, cancels, and demodulates four users independently and performs various levels of interference cancellation. The performance gain of the receiver in a four-user environment under various levels of noise and cancellation are presented.","abstract_html":"Research efforts have shown that capacity in a DS/CDMA cellular system can be increased through the use of digital signal processing techniques that exploit the nature of the multiple access interference (MAI). By jointly demodulating the users in the system, this interference can be characterized and reduced thus decreasing the overall probability of error in the system. Numerous multiuser structures exist, each with varying degrees of complexity and performance. However, the size and complexity of these structures is large relative to a conventional receiver. This effort demonstrates a practical approach to implementing parallel interference cancellation applied to DBPSK DS/CDMA on an FPGA-based configurable computing platform. The system presented acquires, tracks, cancels, and demodulates four users independently and performs various levels of interference cancellation. The performance gain of the receiver in a four-user environment under various levels of noise and cancellation are presented.","abstract_has_math":false,"creators":["Swanchara, Steven F."],"institution":"Virginia Tech","degree_name":"Master of Science","degree_level":"masters","degree_discipline":"Electrical and Computer Engineering","degree_department":"Electrical and Computer Engineering","school":null,"contributors":[],"advisors":[],"committee_chairs":["Reed, Jeffrey H."],"committee_members":["Woerner, Brian D.","Athanas, Peter M."],"year":1998,"date_issued":"1998-07-22","date_published":"1998-07-22","updated_at":"2026-07-22T22:20:25Z","subjects":["Field programmable gate arrays","CDMA","Multiuser Receiver","Interference Cancellation","Configurable Computing"],"languages":[],"rights":["In Copyright"],"rights_urls":["http://rightsstatements.org/vocab/InC/1.0/"],"identifier_entries":[{"key":"dc:identifier.other","label":"Dc Identifier Other","values":["etd-81598-221016"],"render_values":[{"text":"etd-81598-221016","href":null,"code":true}]}]},"links":{"outbound_url":"http://hdl.handle.net/10919/36983","outbound_label":"Handle","outbound_source":"dc:identifier.uri"},"metadata_groups":[{"id":"people","label":"People","entries":[{"key":"dc:contributor.committeechair","label":"Committee Chair","values":["Reed, Jeffrey H."]},{"key":"dc:contributor.committeemember","label":"Committee Member","values":["Woerner, Brian D.","Athanas, Peter M."]},{"key":"dc:contributor.department","label":"Department","values":["Electrical and Computer Engineering"]},{"key":"dc:creator","label":"Author","values":["Swanchara, Steven F."]}]},{"id":"academic_context","label":"Academic Context","entries":[{"key":"dc:date.accessioned","label":"Dc Date Accessioned","values":["2014-03-14T20:52:25Z"]},{"key":"dc:date.available","label":"Dc Date Available","values":["2014-03-14T20:52:25Z","1998-09-17"]},{"key":"dc:date.issued","label":"Date","values":["1998-07-22"]},{"key":"dc:publisher","label":"Institution","values":["Virginia Tech"]},{"key":"dc:type","label":"Dc Type","values":["Thesis"]},{"key":"thesis:degree_discipline","label":"Discipline","values":["Electrical and Computer Engineering"]},{"key":"thesis:degree_level","label":"Degree Level","values":["masters"]},{"key":"thesis:degree_name","label":"Degree Name","values":["Master of Science"]},{"key":"thesis:institution_name","label":"Thesis Institution Name","values":["Virginia Polytechnic Institute and State University"]}]},{"id":"subjects_keywords","label":"Subjects and Keywords","entries":[{"key":"dc:subject","label":"Dc Subject","values":["Field programmable gate arrays","CDMA","Multiuser Receiver","Interference Cancellation","Configurable Computing"]}]},{"id":"language_rights","label":"Language and Rights","entries":[{"key":"dc:rights","label":"Dc Rights","values":["In Copyright"]},{"key":"dc:rights.uri","label":"Rights URI","values":["http://rightsstatements.org/vocab/InC/1.0/"]}]},{"id":"identifiers","label":"Identifiers","entries":[{"key":"dc:identifier.other","label":"Dc Identifier Other","values":["etd-81598-221016"]},{"key":"dc:identifier.uri","label":"Identifier URI","values":["http://hdl.handle.net/10919/36983"]}]},{"id":"additional","label":"Additional Metadata","entries":[{"key":"dc:description.abstract","label":"Abstract","values":["Research efforts have shown that capacity in a DS/CDMA cellular system can be increased through the use of digital signal processing techniques that exploit the nature of the multiple access interference (MAI). By jointly demodulating the users in the system, this interference can be characterized and reduced thus decreasing the overall probability of error in the system. Numerous multiuser structures exist, each with varying degrees of complexity and performance. However, the size and complexity of these structures is large relative to a conventional receiver. This effort demonstrates a practical approach to implementing parallel interference cancellation applied to DBPSK DS/CDMA on an FPGA-based configurable computing platform. The system presented acquires, tracks, cancels, and demodulates four users independently and performs various levels of interference cancellation. The performance gain of the receiver in a four-user environment under various levels of noise and cancellation are presented."]},{"key":"dc:description.degree","label":"Dc Description Degree","values":["Master of Science"]},{"key":"dc:title","label":"Title","values":["An FPGA-Based Multiuser Receiver Employing Parallel Interference Cancellation"]}]}],"canonical_facts":{"dc:contributor.committeechair":["Reed, Jeffrey H."],"dc:contributor.committeemember":["Woerner, Brian D.","Athanas, Peter M."],"dc:contributor.department":["Electrical and Computer Engineering"],"dc:creator":["Swanchara, Steven F."],"dc:date.accessioned":["2014-03-14T20:52:25Z"],"dc:date.available":["2014-03-14T20:52:25Z","1998-09-17"],"dc:date.issued":["1998-07-22"],"dc:description.abstract":["Research efforts have shown that capacity in a DS/CDMA cellular system can be increased through the use of digital signal processing techniques that exploit the nature of the multiple access interference (MAI). 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