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The objective of this thesis is the development of an effective training module made available over the Internet so as to train acquisition and maintenance personnel on how they can use VHDL to design and maintain digital systems. The educational modules provide extensive information on VHDL modeling and testing styles and standards at various abstraction levels. The Sobel edge detector model was chosen as an example to explain the various concepts of modeling and testing. This model was chosen since it was thought to be simple enough for any student to understand, yet complex enough to explain most of the VHDL concepts of modeling and testing. The course material on test bench development at various levels of abstraction, reuse of test bench models, use of configurations for simulation of mixed abstraction and mixed data type models, testing techniques and WAVES was developed as a part of the current thesis. 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