{"id":{"repo_id":"vt","oai_identifier":"oai:vtechworks.lib.vt.edu:10919/34872"},"canonical_url":"https://search.dev.ndltd.org/etd/vt/oai:vtechworks.lib.vt.edu:10919/34872","repository":{"repo_id":"vt","name":"Virginia Tech","base_url":"https://vtechworks.lib.vt.edu/oai/request"},"display":{"title":"Elliptic Curve Cryptography on Heterogeneous Multicore Platform","abstract":"Elliptic curve cryptography (ECC) is becoming the algorithm of choice for digital signature generation and authentication in embedded context. However, performance of ECC and the underlying modular arithmetic on embedded processors remains a concern. At the same time, more complex system-on-chip platforms with multiple heterogeneous cores are commonly available in mobile phones and other embedded devices. In this work we investigate the design space for ECC on TI's OMAP 3530 platform, with a focus of utilizing the on-chip DSP core to improve the performance and efficiency of ECC point multiplication on the target platform. We examine multiple aspects of ECC and heterogeneous design such as algorithm-level choices for elliptic curve operations and the effect of interprocessor communication overhead on the design partitioning. We observe how the limitations of the platform constrict the design space of ECC. However, by closely studying the platform and efficiently partitioning the design between the general purpose ARM core and the DSP, we demonstrate a significant speed-up of the resulting ECC implementation. Our system focused approach allows us to accurately measure the performance and power profiles of the resulting implementation. We conclude that heterogeneous multiprocessor design can significantly improve the performance and power consumption of ECC operations, but that the integration cost and the overhead of interprocessor communication cannot be ignored in any actual system.","abstract_html":"Elliptic curve cryptography (ECC) is becoming the algorithm of choice for digital signature generation and authentication in embedded context. However, performance of ECC and the underlying modular arithmetic on embedded processors remains a concern. At the same time, more complex system-on-chip platforms with multiple heterogeneous cores are commonly available in mobile phones and other embedded devices. In this work we investigate the design space for ECC on TI&#x27;s OMAP 3530 platform, with a focus of utilizing the on-chip DSP core to improve the performance and efficiency of ECC point multiplication on the target platform. We examine multiple aspects of ECC and heterogeneous design such as algorithm-level choices for elliptic curve operations and the effect of interprocessor communication overhead on the design partitioning. We observe how the limitations of the platform constrict the design space of ECC. However, by closely studying the platform and efficiently partitioning the design between the general purpose ARM core and the DSP, we demonstrate a significant speed-up of the resulting ECC implementation. Our system focused approach allows us to accurately measure the performance and power profiles of the resulting implementation. We conclude that heterogeneous multiprocessor design can significantly improve the performance and power consumption of ECC operations, but that the integration cost and the overhead of interprocessor communication cannot be ignored in any actual system.","abstract_has_math":false,"creators":["Morozov, Sergey Victorovich"],"institution":"Virginia Tech","degree_name":"Master of Science","degree_level":"masters","degree_discipline":"Electrical and Computer Engineering","degree_department":"Electrical and Computer Engineering","school":null,"contributors":[],"advisors":[],"committee_chairs":["Schaumont, Patrick R."],"committee_members":["Hsiao, Michael S.","Athanas, Peter M."],"year":2010,"date_issued":"2010-08-31","date_published":"2010-08-31","updated_at":"2026-07-22T22:19:54Z","subjects":["Binary Field","DSP","ARM","Cryptography","Elliptic Curve","Prime Field","Multiprocessor","Point Multiplication","Multicore"],"languages":[],"rights":["In Copyright"],"rights_urls":["http://rightsstatements.org/vocab/InC/1.0/"],"identifier_entries":[{"key":"dc:identifier.other","label":"Dc Identifier Other","values":["etd-08312010-174033"],"render_values":[{"text":"etd-08312010-174033","href":null,"code":true}]}]},"links":{"outbound_url":"http://hdl.handle.net/10919/34872","outbound_label":"Handle","outbound_source":"dc:identifier.uri"},"metadata_groups":[{"id":"people","label":"People","entries":[{"key":"dc:contributor.committeechair","label":"Committee Chair","values":["Schaumont, Patrick R."]},{"key":"dc:contributor.committeemember","label":"Committee Member","values":["Hsiao, Michael S.","Athanas, Peter M."]},{"key":"dc:contributor.department","label":"Department","values":["Electrical and Computer Engineering"]},{"key":"dc:creator","label":"Author","values":["Morozov, Sergey Victorovich"]}]},{"id":"academic_context","label":"Academic Context","entries":[{"key":"dc:date.accessioned","label":"Dc Date Accessioned","values":["2014-03-14T20:44:34Z"]},{"key":"dc:date.available","label":"Dc Date Available","values":["2014-03-14T20:44:34Z","2010-09-15"]},{"key":"dc:date.issued","label":"Date","values":["2010-08-31"]},{"key":"dc:publisher","label":"Institution","values":["Virginia Tech"]},{"key":"dc:type","label":"Dc Type","values":["Thesis"]},{"key":"thesis:degree_discipline","label":"Discipline","values":["Electrical and Computer Engineering"]},{"key":"thesis:degree_level","label":"Degree Level","values":["masters"]},{"key":"thesis:degree_name","label":"Degree Name","values":["Master of Science"]},{"key":"thesis:institution_name","label":"Thesis Institution Name","values":["Virginia Polytechnic Institute and State University"]}]},{"id":"subjects_keywords","label":"Subjects and Keywords","entries":[{"key":"dc:subject","label":"Dc Subject","values":["Binary Field","DSP","ARM","Cryptography","Elliptic Curve","Prime Field","Multiprocessor","Point Multiplication","Multicore"]}]},{"id":"language_rights","label":"Language and Rights","entries":[{"key":"dc:rights","label":"Dc Rights","values":["In Copyright"]},{"key":"dc:rights.uri","label":"Rights URI","values":["http://rightsstatements.org/vocab/InC/1.0/"]}]},{"id":"identifiers","label":"Identifiers","entries":[{"key":"dc:identifier.other","label":"Dc Identifier Other","values":["etd-08312010-174033"]},{"key":"dc:identifier.uri","label":"Identifier URI","values":["http://hdl.handle.net/10919/34872"]}]},{"id":"additional","label":"Additional Metadata","entries":[{"key":"dc:description.abstract","label":"Abstract","values":["Elliptic curve cryptography (ECC) is becoming the algorithm of choice for digital signature generation and authentication in embedded context. However, performance of ECC and the underlying modular arithmetic on embedded processors remains a concern. At the same time, more complex system-on-chip platforms with multiple heterogeneous cores are commonly available in mobile phones and other embedded devices. In this work we investigate the design space for ECC on TI's OMAP 3530 platform, with a focus of utilizing the on-chip DSP core to improve the performance and efficiency of ECC point multiplication on the target platform. We examine multiple aspects of ECC and heterogeneous design such as algorithm-level choices for elliptic curve operations and the effect of interprocessor communication overhead on the design partitioning. We observe how the limitations of the platform constrict the design space of ECC. However, by closely studying the platform and efficiently partitioning the design between the general purpose ARM core and the DSP, we demonstrate a significant speed-up of the resulting ECC implementation. Our system focused approach allows us to accurately measure the performance and power profiles of the resulting implementation. We conclude that heterogeneous multiprocessor design can significantly improve the performance and power consumption of ECC operations, but that the integration cost and the overhead of interprocessor communication cannot be ignored in any actual system."]},{"key":"dc:description.degree","label":"Dc Description Degree","values":["Master of Science"]},{"key":"dc:title","label":"Title","values":["Elliptic Curve Cryptography on Heterogeneous Multicore Platform"]}]}],"canonical_facts":{"dc:contributor.committeechair":["Schaumont, Patrick R."],"dc:contributor.committeemember":["Hsiao, Michael S.","Athanas, Peter M."],"dc:contributor.department":["Electrical and Computer Engineering"],"dc:creator":["Morozov, Sergey Victorovich"],"dc:date.accessioned":["2014-03-14T20:44:34Z"],"dc:date.available":["2014-03-14T20:44:34Z","2010-09-15"],"dc:date.issued":["2010-08-31"],"dc:description.abstract":["Elliptic curve cryptography (ECC) is becoming the algorithm of choice for digital signature generation and authentication in embedded context. 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