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Virginia Tech

Exploiting Malleable Parallelism on Multicore Systems

Abstract

dc:description.abstract

As shared memory platforms continue to grow in core counts, the need for context-aware scheduling continues to grow. Context-aware scheduling takes into account characteristics of the system and application performance when making decisions. Traditionally applications run on a static thread count that is set at compile-time or at job start time, without taking into account the dynamic context of the system, other running applications, and potentially the performance of the application itself. However, many shared memory applications can easily be converted to malleable applications, that is, applications that can run with an arbitrary number of threads and can change thread counts during execution. Many new and intelligent scheduling decisions can be made when applications become context-aware, including expanding to ll an empty system or shrinking to accommodate a more parallelizable job. This thesis describes a prototype system called Resizing for Shared Memory (RSM), which supports OpenMP applications on shared memory platforms. RSM includes a main daemon that records performance information and makes resizing decisions as well as a communication library to allow applications to contact the RSM daemon and enact resizing decisions. Experimental results show that RSM can improve turn-around time and system utilization even using very simple heuristics and resizing policies.

Degree

thesis:*
Name thesis:degree_name
Master of Science
Level thesis:degree_level
masters
Discipline thesis:degree_discipline
Computer Science
Department dc:contributor.department
Computer Science
Grantor dc:publisher
Virginia Tech
Year dc:date.issued
2011

Author and committee

dc:creator, dc:contributor.*
Author dc:creator
  • McFarland, Daniel James
Chair dc:contributor.committeechair
  • Ribbens, Calvin J.
Committee members dc:contributor.committeemember
  • Back, Godmar V.
  • Butt, Ali R.

Subjects

dc:subject × 4

Rights

dc:rights
Statement dc:rights
  • In Copyright

Identifiers

dc:identifier.*
Dc Identifier Other
etd-06292011-130247
OAI identifier oai:identifier
oai:vtechworks.lib.vt.edu:10919/33819

Chain of custody

source
Harvested from
Virginia Tech
Base URL
vtechworks.lib.vt.edu/oai/request
Last updated
2026-07-22
Source record
OAI-PMH GetRecord
citation

McFarland, Daniel James. Exploiting Malleable Parallelism on Multicore Systems. masters thesis, Virginia Tech, 2011. http://hdl.handle.net/10919/33819