Runtime Intellectual Property Protection on Programmable Platforms

Modern Field-Programmable Gate Arrays (FPGAs) can accommodate complex system-on-chip designs and require extensive intellectual-property (IP) support. However, current IP protection mechanisms in FPGAs are limited, and do not reach beyond whole-design bitstream encryption. This work presents an architecture and protocol for securing IP based designs in programmable platforms. The architecture is reprsented by the Secure Authentication Module (SAM), an enabler for next-generation intellectual-property exchange in complex FPGAs. SAM protects hardware, software, application data, and also provides mutual assurances for the end-user and the intellectual-property developer. Further, this work demonstrates the use of SAM in a secure video messaging device on top of a Virtex-II Pro development system.

Name thesis:degree_name

Master of Science

Level thesis:degree_level

masters

Discipline thesis:degree_discipline

Electrical and Computer Engineering

Department dc:contributor.department

Electrical and Computer Engineering

Grantor dc:publisher

Virginia Tech

Year dc:date.issued

2007

Author dc:creator

• Simpson, Eric

Chair dc:contributor.committeechair

• Schaumont, Patrick R.

Committee members dc:contributor.committeemember

• Shukla, Sandeep K.
• Ha, Dong Sam

• runtime protection
• intellectual property
• HW/SW authentication
• PUF
• IP
• programmable platform
• Field programmable gate arrays

Statement dc:rights

• In Copyright

Licence dc:rights.uri

• http://rightsstatements.org/vocab/InC/1.0/

Dc Identifier Other

etd-05042007-092729

OAI identifier oai:identifier

oai:vtechworks.lib.vt.edu:10919/32184