{"id":{"repo_id":"vt","oai_identifier":"oai:vtechworks.lib.vt.edu:10919/28729"},"canonical_url":"https://search.dev.ndltd.org/etd/vt/oai:vtechworks.lib.vt.edu:10919/28729","repository":{"repo_id":"vt","name":"Virginia Tech","base_url":"https://vtechworks.lib.vt.edu/oai/request"},"display":{"title":"Rapid Radio: Analysis-Based Receiver Deployment","abstract":"A large body of work has been produced in the area of productivity enhancers for the design of both Software-Defined Radio and Field Programmable Gate Arrays systems. These tool are created with the goal of aiding the user in the process of instantiating a design. They do not address, however, a specific use-case in which the user does not know or care about what the design of his system is. In this work, analysis-based design is presented and applied to FPGA-based SDRs. The RapidRadio framework abstracts away much of the knowledge required for analyzing an unknown signal and building an FPGA-based receiver. Resource utilization is traded-off for reduced implementation time and increased exibility. Automatic modulation classification is done with blind parameter estimation. Unlike other contemporary work, no a priori knowledge about the signal being classified is assumed. This leads to the development of a system that does not depend on perfect synchronization to classify the signal. A new quasi-generic synchronization architecture that allows the synchronization of multiple modulations schemes is presented. The result of the modulation classification is used to automatically create an FPGA-based radio receiver.","abstract_html":"A large body of work has been produced in the area of productivity enhancers for the design of both Software-Defined Radio and Field Programmable Gate Arrays systems. These tool are created with the goal of aiding the user in the process of instantiating a design. They do not address, however, a specific use-case in which the user does not know or care about what the design of his system is. In this work, analysis-based design is presented and applied to FPGA-based SDRs. The RapidRadio framework abstracts away much of the knowledge required for analyzing an unknown signal and building an FPGA-based receiver. Resource utilization is traded-off for reduced implementation time and increased exibility. Automatic modulation classification is done with blind parameter estimation. Unlike other contemporary work, no a priori knowledge about the signal being classified is assumed. This leads to the development of a system that does not depend on perfect synchronization to classify the signal. A new quasi-generic synchronization architecture that allows the synchronization of multiple modulations schemes is presented. The result of the modulation classification is used to automatically create an FPGA-based radio receiver.","abstract_has_math":false,"creators":["Suris Pietri, Jorge Alberto"],"institution":"Virginia Tech","degree_name":"Ph. D.","degree_level":"doctoral","degree_discipline":"Electrical and Computer Engineering","degree_department":"Electrical and Computer Engineering","school":null,"contributors":[],"advisors":[],"committee_chairs":["Athanas, Peter M."],"committee_members":["Abbott, A. Lynn","Butt, Ali R.","Reed, Jeffrey H.","Patterson, Cameron D."],"year":2009,"date_issued":"2009-08-07","date_published":"2009-08-07","updated_at":"2026-07-22T22:19:51Z","subjects":["Productivity","Rapid Prototyping","Field programmable gate arrays","Automation","Synchronization","Signal Classification","Synthesis"],"languages":[],"rights":["In Copyright"],"rights_urls":["http://rightsstatements.org/vocab/InC/1.0/"],"identifier_entries":[{"key":"dc:identifier.other","label":"Dc Identifier Other","values":["etd-08192009-221317"],"render_values":[{"text":"etd-08192009-221317","href":null,"code":true}]}]},"links":{"outbound_url":"http://hdl.handle.net/10919/28729","outbound_label":"Handle","outbound_source":"dc:identifier.uri"},"metadata_groups":[{"id":"people","label":"People","entries":[{"key":"dc:contributor.committeechair","label":"Committee Chair","values":["Athanas, Peter M."]},{"key":"dc:contributor.committeemember","label":"Committee Member","values":["Abbott, A. Lynn","Butt, Ali R.","Reed, Jeffrey H.","Patterson, Cameron D."]},{"key":"dc:contributor.department","label":"Department","values":["Electrical and Computer Engineering"]},{"key":"dc:creator","label":"Author","values":["Suris Pietri, Jorge Alberto"]}]},{"id":"academic_context","label":"Academic Context","entries":[{"key":"dc:date.accessioned","label":"Dc Date Accessioned","values":["2014-03-14T20:15:27Z"]},{"key":"dc:date.available","label":"Dc Date Available","values":["2014-03-14T20:15:27Z","2009-08-26"]},{"key":"dc:date.issued","label":"Date","values":["2009-08-07"]},{"key":"dc:publisher","label":"Institution","values":["Virginia Tech"]},{"key":"dc:type","label":"Dc Type","values":["Dissertation"]},{"key":"thesis:degree_discipline","label":"Discipline","values":["Electrical and Computer Engineering"]},{"key":"thesis:degree_level","label":"Degree Level","values":["doctoral"]},{"key":"thesis:degree_name","label":"Degree Name","values":["Ph. D."]},{"key":"thesis:institution_name","label":"Thesis Institution Name","values":["Virginia Polytechnic Institute and State University"]}]},{"id":"subjects_keywords","label":"Subjects and Keywords","entries":[{"key":"dc:subject","label":"Dc Subject","values":["Productivity","Rapid Prototyping","Field programmable gate arrays","Automation","Synchronization","Signal Classification","Synthesis"]}]},{"id":"language_rights","label":"Language and Rights","entries":[{"key":"dc:rights","label":"Dc Rights","values":["In Copyright"]},{"key":"dc:rights.uri","label":"Rights URI","values":["http://rightsstatements.org/vocab/InC/1.0/"]}]},{"id":"identifiers","label":"Identifiers","entries":[{"key":"dc:identifier.other","label":"Dc Identifier Other","values":["etd-08192009-221317"]},{"key":"dc:identifier.uri","label":"Identifier URI","values":["http://hdl.handle.net/10919/28729"]}]},{"id":"additional","label":"Additional Metadata","entries":[{"key":"dc:description.abstract","label":"Abstract","values":["A large body of work has been produced in the area of productivity enhancers for the design of both Software-Defined Radio and Field Programmable Gate Arrays systems. These tool are created with the goal of aiding the user in the process of instantiating a design. They do not address, however, a specific use-case in which the user does not know or care about what the design of his system is. In this work, analysis-based design is presented and applied to FPGA-based SDRs. The RapidRadio framework abstracts away much of the knowledge required for analyzing an unknown signal and building an FPGA-based receiver. Resource utilization is traded-off for reduced implementation time and increased exibility. Automatic modulation classification is done with blind parameter estimation. Unlike other contemporary work, no a priori knowledge about the signal being classified is assumed. This leads to the development of a system that does not depend on perfect synchronization to classify the signal. A new quasi-generic synchronization architecture that allows the synchronization of multiple modulations schemes is presented. The result of the modulation classification is used to automatically create an FPGA-based radio receiver."]},{"key":"dc:description.degree","label":"Dc Description Degree","values":["Ph. D."]},{"key":"dc:title","label":"Title","values":["Rapid Radio: Analysis-Based Receiver Deployment"]}]}],"canonical_facts":{"dc:contributor.committeechair":["Athanas, Peter M."],"dc:contributor.committeemember":["Abbott, A. Lynn","Butt, Ali R.","Reed, Jeffrey H.","Patterson, Cameron D."],"dc:contributor.department":["Electrical and Computer Engineering"],"dc:creator":["Suris Pietri, Jorge Alberto"],"dc:date.accessioned":["2014-03-14T20:15:27Z"],"dc:date.available":["2014-03-14T20:15:27Z","2009-08-26"],"dc:date.issued":["2009-08-07"],"dc:description.abstract":["A large body of work has been produced in the area of productivity enhancers for the design of both Software-Defined Radio and Field Programmable Gate Arrays systems. These tool are created with the goal of aiding the user in the process of instantiating a design. They do not address, however, a specific use-case in which the user does not know or care about what the design of his system is. In this work, analysis-based design is presented and applied to FPGA-based SDRs. The RapidRadio framework abstracts away much of the knowledge required for analyzing an unknown signal and building an FPGA-based receiver. Resource utilization is traded-off for reduced implementation time and increased exibility. Automatic modulation classification is done with blind parameter estimation. Unlike other contemporary work, no a priori knowledge about the signal being classified is assumed. This leads to the development of a system that does not depend on perfect synchronization to classify the signal. A new quasi-generic synchronization architecture that allows the synchronization of multiple modulations schemes is presented. The result of the modulation classification is used to automatically create an FPGA-based radio receiver."],"dc:description.degree":["Ph. D."],"dc:identifier.other":["etd-08192009-221317"],"dc:identifier.uri":["http://hdl.handle.net/10919/28729"],"dc:publisher":["Virginia Tech"],"dc:rights":["In Copyright"],"dc:rights.uri":["http://rightsstatements.org/vocab/InC/1.0/"],"dc:subject":["Productivity","Rapid Prototyping","Field programmable gate arrays","Automation","Synchronization","Signal Classification","Synthesis"],"dc:title":["Rapid Radio: Analysis-Based Receiver Deployment"],"dc:type":["Dissertation"],"thesis:degree_discipline":["Electrical and Computer Engineering"],"thesis:degree_level":["doctoral"],"thesis:degree_name":["Ph. D."],"thesis:institution_name":["Virginia Polytechnic Institute and State University"]},"updated_at":"2026-07-22T22:19:51Z"}