Design and FPGA Implementation of Optimized and Digital Multiplexing Spiking Encoders for Neuromorphic Computing

Machine Learning (ML) and Artificial Intelligence (AI) have driven rapid progress in wireless communications, particularly in spectrum sensing for cognitive radios. Accurate identifica tion of occupied and unoccupied spectrum bands is vital to address spectrum scarcity and enable secondary users to make efficient use of available frequencies. Liquid State Ma chines (LSMs), built on spiking neural networks inspired by biological computation, provide a promising framework for real-time spectrum monitoring. A crucial step in this process is spike encoding, which converts continuous input signals into discrete spike trains. This encoding not only preserves temporal features of the spectrum but also allows the reservoir to exploit time-dependent dynamics for richer representations. By combining spike encoding with the inherent temporal processing capabilities of LSMs, specialized accelerators and pro cessors achieve faster, more energy-efficient, and more accurate spectrum classification than conventional sensing methods. Furthermore, the design of training algorithms and optimized learning algorithms within LSM processors plays a pivotal role in maximizing their perfor mance. This thesis is divided into two main parts. The first focuses on the development and implementation of learning algorithms for spectrum classification using an LSM processor as part of my research work during my master’s study. The second part, as my primary research work, investigates and optimizes the spiking encoding algorithm to improve input representation and system efficiency. Both parts are realized on Field-Programmable Gate Arrays (FPGAs), leveraging their programmability and massively parallel computing capa bilities to enable high-performance hardware implementation. Lastly, the thesis provides a comprehensive analysis of the proposed spiking encoder and points out the future research direction of the spiking encoding algorithm. The results show that the proposed multiplexing temporal encoding method surpasses existing state-of-the-art rate and temporal encoding al gorithms in both performance and noise robustness across most test cases. It achieves up to a 9.95× improvement in signal reconstruction accuracy compared to other encoding tech niques. In addition, the optimized rate encoding architectures outperform current models, providing up to a 3.5× accuracy gain across all evaluated signals. Furthermore, the pro posed TTFS-based architecture delivers up to a 5.5× improvement in accuracy over existing methods while simultaneously reducing logic resource utilization by 57.1%, highlighting its efficiency for hardware implementation.

Name thesis:degree_name

Master of Science

Level thesis:degree_level

masters

Discipline thesis:degree_discipline

Computer Engineering

Department dc:contributor.department

Electrical and Computer Engineering

Grantor dc:publisher

Virginia Tech

Year dc:date.issued

2025

Author dc:creator

• Li, Ruizhe

Chair dc:contributor.committeechair

• Yi, Yang

Committee members dc:contributor.committeemember

• Ha, Dong S.
• Thweatt, Jason S.

• Artificial Intelligence
• Recurrent Neural Network
• Field Programmable Gate Array
• Spiking Encoding
• Hardware Accelerator

Statement dc:rights

• In Copyright

Licence dc:rights.uri

• http://rightsstatements.org/vocab/InC/1.0/

Language dc:language.iso

en

Handle dc:identifier.uri

https://hdl.handle.net/10919/139923

OAI identifier oai:identifier

oai:vtechworks.lib.vt.edu:10919/139923