{"id":{"repo_id":"vt","oai_identifier":"oai:vtechworks.lib.vt.edu:10919/137646"},"canonical_url":"https://search.dev.ndltd.org/etd/vt/oai:vtechworks.lib.vt.edu:10919/137646","repository":{"repo_id":"vt","name":"Virginia Tech","base_url":"https://vtechworks.lib.vt.edu/oai/request"},"display":{"title":"Hardware Memory Compression for Large-scale Systems","abstract":"Memory has become an increasingly costly resource for both users and service providers, while also contributing significantly to global energy consumption and environmental impact. Memory compression offers a promising solution to mitigate these costs, as memory values exhibit an average compression ratio of up to 3x. Recent work has proposed enhancing the CPU's memory controller to compress memory values transparently, thereby increasing effective memory capacity—an approach referred to as hardware memory compression. This dissertation focuses on hardware memory compression for large-scale systems. In general, large-scale systems have unique properties: (1) applications are more demanding on address translation, (2) many users execute workloads requesting different amounts of memory concurrently, and (3) these systems have stricter reliability requirements. These properties introduce new challenges when implementing hardware memory compression. This dissertation explores hardware-software co-design to address the challenges. To reduce address translation overhead, we propose selectively compressing cold memory pages while keeping hot pages uncompressed. To enable precise memory allocation, we introduce a novel memory allocation mechanism coupled with a dedicated interface. Finally, this dissertation proposes a novel scheduling scheme that avoids relying on existing speculative-based scheduling which makes the system reliable. Collectively, these works aim to make hardware memory compression deployable in large-scale systems.","abstract_html":"Memory has become an increasingly costly resource for both users and service providers, while also contributing significantly to global energy consumption and environmental impact. Memory compression offers a promising solution to mitigate these costs, as memory values exhibit an average compression ratio of up to 3x. Recent work has proposed enhancing the CPU's memory controller to compress memory values transparently, thereby increasing effective memory capacity—an approach referred to as hardware memory compression. This dissertation focuses on hardware memory compression for large-scale systems. In general, large-scale systems have unique properties: (1) applications are more demanding on address translation, (2) many users execute workloads requesting different amounts of memory concurrently, and (3) these systems have stricter reliability requirements. These properties introduce new challenges when implementing hardware memory compression. This dissertation explores hardware-software co-design to address the challenges. To reduce address translation overhead, we propose selectively compressing cold memory pages while keeping hot pages uncompressed. To enable precise memory allocation, we introduce a novel memory allocation mechanism coupled with a dedicated interface. Finally, this dissertation proposes a novel scheduling scheme that avoids relying on existing speculative-based scheduling which makes the system reliable. Collectively, these works aim to make hardware memory compression deployable in large-scale systems.","abstract_has_math":false,"creators":["Laghari, Muhammad"],"institution":"Virginia Tech","degree_name":"Doctor of Philosophy","degree_level":"doctoral","degree_discipline":"Computer Science & Applications","degree_department":"Computer Science and Applications","school":null,"contributors":[],"advisors":[],"committee_chairs":["Jian, Xun"],"committee_members":["Ravindran, Binoy","Hicks, Matthew","Choukse, Esha","Butt, Ali R."],"year":2025,"date_issued":"2025-09-08","date_published":"2025-09-08","updated_at":"2026-07-22T22:19:01Z","subjects":["hardware memory compression","memory management","large-scale systems","reliability","memory allocation"],"languages":["en"],"rights":["In Copyright"],"rights_urls":["http://rightsstatements.org/vocab/InC/1.0/"],"identifier_entries":[{"key":"dc:identifier.other","label":"Dc Identifier Other","values":["vt_gsexam:44587"],"render_values":[{"text":"vt_gsexam:44587","href":null,"code":true}]}]},"links":{"outbound_url":"https://hdl.handle.net/10919/137646","outbound_label":"Handle","outbound_source":"dc:identifier.uri"},"metadata_groups":[{"id":"people","label":"People","entries":[{"key":"dc:contributor.committeechair","label":"Committee Chair","values":["Jian, Xun"]},{"key":"dc:contributor.committeemember","label":"Committee Member","values":["Ravindran, Binoy","Hicks, Matthew","Choukse, Esha","Butt, Ali R."]},{"key":"dc:contributor.department","label":"Department","values":["Computer Science and Applications"]},{"key":"dc:creator","label":"Author","values":["Laghari, Muhammad"]}]},{"id":"academic_context","label":"Academic Context","entries":[{"key":"dc:date.accessioned","label":"Dc Date Accessioned","values":["2025-09-09T08:01:31Z"]},{"key":"dc:date.available","label":"Dc Date Available","values":["2025-09-09T08:01:31Z"]},{"key":"dc:date.issued","label":"Date","values":["2025-09-08"]},{"key":"dc:publisher","label":"Institution","values":["Virginia Tech"]},{"key":"dc:type","label":"Dc Type","values":["Dissertation"]},{"key":"thesis:degree_discipline","label":"Discipline","values":["Computer Science & Applications"]},{"key":"thesis:degree_level","label":"Degree Level","values":["doctoral"]},{"key":"thesis:degree_name","label":"Degree Name","values":["Doctor of Philosophy"]},{"key":"thesis:institution_name","label":"Thesis Institution Name","values":["Virginia Polytechnic Institute and State University"]}]},{"id":"subjects_keywords","label":"Subjects and Keywords","entries":[{"key":"dc:subject","label":"Dc Subject","values":["hardware memory compression","memory management","large-scale systems","reliability","memory allocation"]}]},{"id":"language_rights","label":"Language and Rights","entries":[{"key":"dc:language.iso","label":"Language (ISO)","values":["en"]},{"key":"dc:rights","label":"Dc Rights","values":["In Copyright"]},{"key":"dc:rights.uri","label":"Rights URI","values":["http://rightsstatements.org/vocab/InC/1.0/"]}]},{"id":"identifiers","label":"Identifiers","entries":[{"key":"dc:identifier.other","label":"Dc Identifier Other","values":["vt_gsexam:44587"]},{"key":"dc:identifier.uri","label":"Identifier URI","values":["https://hdl.handle.net/10919/137646"]}]},{"id":"additional","label":"Additional Metadata","entries":[{"key":"dc:description.abstract","label":"Abstract","values":["Memory has become an increasingly costly resource for both users and service providers, while also contributing significantly to global energy consumption and environmental impact. Memory compression offers a promising solution to mitigate these costs, as memory values exhibit an average compression ratio of up to 3x. Recent work has proposed enhancing the CPU's memory controller to compress memory values transparently, thereby increasing effective memory capacity—an approach referred to as hardware memory compression. This dissertation focuses on hardware memory compression for large-scale systems. In general, large-scale systems have unique properties: (1) applications are more demanding on address translation, (2) many users execute workloads requesting different amounts of memory concurrently, and (3) these systems have stricter reliability requirements. These properties introduce new challenges when implementing hardware memory compression. This dissertation explores hardware-software co-design to address the challenges. To reduce address translation overhead, we propose selectively compressing cold memory pages while keeping hot pages uncompressed. To enable precise memory allocation, we introduce a novel memory allocation mechanism coupled with a dedicated interface. Finally, this dissertation proposes a novel scheduling scheme that avoids relying on existing speculative-based scheduling which makes the system reliable. Collectively, these works aim to make hardware memory compression deployable in large-scale systems."]},{"key":"dc:description.abstractgeneral","label":"General Abstract","values":["Computer memory is becoming more expensive and is using more energy than ever before. This not only increases costs for both individuals and companies, but also adds to the environmental impact of large-scale computing. One promising way to reduce these costs is by compressing data in memory—similar to how we compress files to save space. On average, memory data can be made three times smaller using compression. This research explores how to make memory compression work directly in computer hardware, so it can happen automatically and efficiently. While this idea works well in small systems, it creates new problems in large-scale environments, like cloud data centers, where many users run demanding applications at the same time. These systems require faster access to memory, fair sharing of memory among users, and strong reliability. To address these challenges, this dissertation introduces new methods that combine both hardware and software design. These include compressing only less-used data to speed up access, developing new ways to manage how memory is shared among users, and creating a safer way to decide when to run new tasks without risking system crashes. Together, these solutions make it more practical to use memory compression in the large-scale systems that power today's digital world."]},{"key":"dc:description.degree","label":"Dc Description Degree","values":["Doctor of Philosophy"]},{"key":"dc:format.medium","label":"Dc Format Medium","values":["ETD"]},{"key":"dc:title","label":"Title","values":["Hardware Memory Compression for Large-scale Systems"]}]}],"canonical_facts":{"dc:contributor.committeechair":["Jian, Xun"],"dc:contributor.committeemember":["Ravindran, Binoy","Hicks, Matthew","Choukse, Esha","Butt, Ali R."],"dc:contributor.department":["Computer Science and Applications"],"dc:creator":["Laghari, Muhammad"],"dc:date.accessioned":["2025-09-09T08:01:31Z"],"dc:date.available":["2025-09-09T08:01:31Z"],"dc:date.issued":["2025-09-08"],"dc:description.abstract":["Memory has become an increasingly costly resource for both users and service providers, while also contributing significantly to global energy consumption and environmental impact. Memory compression offers a promising solution to mitigate these costs, as memory values exhibit an average compression ratio of up to 3x. Recent work has proposed enhancing the CPU's memory controller to compress memory values transparently, thereby increasing effective memory capacity—an approach referred to as hardware memory compression. This dissertation focuses on hardware memory compression for large-scale systems. In general, large-scale systems have unique properties: (1) applications are more demanding on address translation, (2) many users execute workloads requesting different amounts of memory concurrently, and (3) these systems have stricter reliability requirements. These properties introduce new challenges when implementing hardware memory compression. This dissertation explores hardware-software co-design to address the challenges. To reduce address translation overhead, we propose selectively compressing cold memory pages while keeping hot pages uncompressed. To enable precise memory allocation, we introduce a novel memory allocation mechanism coupled with a dedicated interface. Finally, this dissertation proposes a novel scheduling scheme that avoids relying on existing speculative-based scheduling which makes the system reliable. Collectively, these works aim to make hardware memory compression deployable in large-scale systems."],"dc:description.abstractgeneral":["Computer memory is becoming more expensive and is using more energy than ever before. This not only increases costs for both individuals and companies, but also adds to the environmental impact of large-scale computing. One promising way to reduce these costs is by compressing data in memory—similar to how we compress files to save space. On average, memory data can be made three times smaller using compression. This research explores how to make memory compression work directly in computer hardware, so it can happen automatically and efficiently. While this idea works well in small systems, it creates new problems in large-scale environments, like cloud data centers, where many users run demanding applications at the same time. These systems require faster access to memory, fair sharing of memory among users, and strong reliability. To address these challenges, this dissertation introduces new methods that combine both hardware and software design. These include compressing only less-used data to speed up access, developing new ways to manage how memory is shared among users, and creating a safer way to decide when to run new tasks without risking system crashes. Together, these solutions make it more practical to use memory compression in the large-scale systems that power today's digital world."],"dc:description.degree":["Doctor of Philosophy"],"dc:format.medium":["ETD"],"dc:identifier.other":["vt_gsexam:44587"],"dc:identifier.uri":["https://hdl.handle.net/10919/137646"],"dc:language.iso":["en"],"dc:publisher":["Virginia Tech"],"dc:rights":["In Copyright"],"dc:rights.uri":["http://rightsstatements.org/vocab/InC/1.0/"],"dc:subject":["hardware memory compression","memory management","large-scale systems","reliability","memory allocation"],"dc:title":["Hardware Memory Compression for Large-scale Systems"],"dc:type":["Dissertation"],"thesis:degree_discipline":["Computer Science & Applications"],"thesis:degree_level":["doctoral"],"thesis:degree_name":["Doctor of Philosophy"],"thesis:institution_name":["Virginia Polytechnic Institute and State University"]},"updated_at":"2026-07-22T22:19:01Z"}