Insulation Design and Analysis for Medium-Voltage SiC-based Power Electronics Building Blocks

In this dissertation, a design approach for medium voltage (MV) PCB-based components, such as the dc bus, is detailed. Key considerations, including electric field (E-field) grading near power terminals and PCB edges, cable feedthroughs, and the integration of components, are explored from the perspective of E-field management. A design example of a 3-level dc bus for a 6 kV-1 MW Power Electronics Building Block (PEBB) is presented. This PEBB was assembled using an array of low-voltage (LV) capacitors to create 3 kV PCB-based capacitor daughtercards, applying the same design principles as the dc bus. The scalability of this design approach is demonstrated with a 9-level dc bus rated for 24 kV. The insulation quality and MV performance of all PCBs have been assessed through partial discharge (PD) analysis using an Omicron MPD 600. The high-voltage (HV) design approach takes into account the mitigation of peak electric field intensity to minimize insulation degradation caused by electrical stress. In addition to electrical stress, the current carrying capacity (CCC) of these printed circuit boards (PCBs) was assessed concerning steady-state thermal performance and short-circuit (SC) robustness. Multiple configurations were examined to determine the current density, with the aim of reducing temperature. The insulation performance following repetitive fault events was monitored. Although the Partial Discharge Inception Voltage (PDIV) reduced by 50% after 140 SC faults, it remained higher than the operational voltage. This demonstrates the feasibility of utilizing HV PCBs in practical applications. Finally, the insulation performance of a complete 6 kV PEBB assembly was assessed. The PEBB was assembled component by component, with a focus on tracking the PDIV at each stage. This approach allowed for the qualification of the PEBB for use in a 24 kV PEBB-based converter with a common mode (CM) PDIV of 33.2 kV. Subsequently, multiple PEBBs underwent testing to simulate their operation within a 24 kV converter configuration, ensuring dependable performance when assembled. Custom support structures were also designed and tested to accommodate the 24 kV PCB bus and dc-link capacitors, serving as interconnections between multiple phase legs and the external voltage source.

Name thesis:degree_name

Doctor of Philosophy

Level thesis:degree_level

doctoral

Discipline thesis:degree_discipline

Electrical Engineering

Department dc:contributor.department

Electrical Engineering

Grantor dc:publisher

Virginia Tech

Year dc:date.issued

2024

Author dc:creator

• Stewart, Joshua

Chair dc:contributor.committeechair

• Burgos, Rolando

Committee members dc:contributor.committeemember

• Lu, Guo Quan
• Lehr, Jane M.
• Scales, Wayne A.
• Dong, Dong

• Partial Discharge
• Medium Voltage PCB
• High Voltage PCB
• PCB Bus
• Capacitor Daughtercards
• E-field Control
• Power Electronics Building Block
• PEBB
• Modular Multilevel Converter

Statement dc:rights

• In Copyright

Licence dc:rights.uri

• http://rightsstatements.org/vocab/InC/1.0/

Language dc:language.iso

en

Dc Identifier Other

vt_gsexam:38716

OAI identifier oai:identifier

oai:vtechworks.lib.vt.edu:10919/119028