{"id":{"repo_id":"vt","oai_identifier":"oai:vtechworks.lib.vt.edu:10919/104361"},"canonical_url":"https://search.dev.ndltd.org/etd/vt/oai:vtechworks.lib.vt.edu:10919/104361","repository":{"repo_id":"vt","name":"Virginia Tech","base_url":"https://vtechworks.lib.vt.edu/oai/request"},"display":{"title":"3D Commutation-Loop Design Methodology for a SiC Based Matrix Converter run in Step-up mode with PCB Aluminum Nitride Cooling Inlay","abstract":"This work investigates three-dimensional power loop layout for application to a SiC based matrix converter, providing a symmetric, low-inductance solution. The thesis presents various layout types to achieve this design target, and details the implementation of a hybrid layout to the matrix converter phase-leg. This layout is more easily achievable with a surface-mount device package, which also offers benefits such as ease in manufacturing, and a compact package. In order to implement a surface-mount device, a PCB thermal management strategy should be utilized. An evaluation of these methods is also presented in the work. The final power loop solution that implements an aluminum nitride inlay is evaluated through simulated parasitic extraction and experimental double pulse tests. The layout achieves small, symmetric loop inductances. Finally, the full power, three-phase matrix converter demonstrates the successful implementation of this power loop layout.","abstract_html":"This work investigates three-dimensional power loop layout for application to a SiC based matrix converter, providing a symmetric, low-inductance solution. The thesis presents various layout types to achieve this design target, and details the implementation of a hybrid layout to the matrix converter phase-leg. This layout is more easily achievable with a surface-mount device package, which also offers benefits such as ease in manufacturing, and a compact package. In order to implement a surface-mount device, a PCB thermal management strategy should be utilized. An evaluation of these methods is also presented in the work. The final power loop solution that implements an aluminum nitride inlay is evaluated through simulated parasitic extraction and experimental double pulse tests. The layout achieves small, symmetric loop inductances. Finally, the full power, three-phase matrix converter demonstrates the successful implementation of this power loop layout.","abstract_has_math":false,"creators":["Baker, Victoria Isabelle"],"institution":"Virginia Tech","degree_name":"Master of Science","degree_level":"masters","degree_discipline":"Electrical Engineering","degree_department":"Electrical Engineering","school":null,"contributors":[],"advisors":[],"committee_chairs":["Burgos, Rolando"],"committee_members":["Dong, Dong","Wen, Bo"],"year":2021,"date_issued":"2021-07-22","date_published":"2021-07-22","updated_at":"2026-07-22T22:20:00Z","subjects":["matrix converter","silicon carbide","surface mount device","power loop design","low inductance"],"languages":[],"rights":["In Copyright"],"rights_urls":["http://rightsstatements.org/vocab/InC/1.0/"],"identifier_entries":[{"key":"dc:identifier.other","label":"Dc Identifier Other","values":["vt_gsexam:31897"],"render_values":[{"text":"vt_gsexam:31897","href":null,"code":true}]}]},"links":{"outbound_url":"http://hdl.handle.net/10919/104361","outbound_label":"Handle","outbound_source":"dc:identifier.uri"},"metadata_groups":[{"id":"people","label":"People","entries":[{"key":"dc:contributor.committeechair","label":"Committee Chair","values":["Burgos, Rolando"]},{"key":"dc:contributor.committeemember","label":"Committee Member","values":["Dong, Dong","Wen, Bo"]},{"key":"dc:contributor.department","label":"Department","values":["Electrical Engineering"]},{"key":"dc:creator","label":"Author","values":["Baker, Victoria Isabelle"]}]},{"id":"academic_context","label":"Academic Context","entries":[{"key":"dc:date.accessioned","label":"Dc Date Accessioned","values":["2021-07-23T08:00:20Z"]},{"key":"dc:date.available","label":"Dc Date Available","values":["2021-07-23T08:00:20Z"]},{"key":"dc:date.issued","label":"Date","values":["2021-07-22"]},{"key":"dc:publisher","label":"Institution","values":["Virginia Tech"]},{"key":"dc:type","label":"Dc Type","values":["Thesis"]},{"key":"thesis:degree_discipline","label":"Discipline","values":["Electrical Engineering"]},{"key":"thesis:degree_level","label":"Degree Level","values":["masters"]},{"key":"thesis:degree_name","label":"Degree Name","values":["Master of Science"]},{"key":"thesis:institution_name","label":"Thesis Institution Name","values":["Virginia Polytechnic Institute and State University"]}]},{"id":"subjects_keywords","label":"Subjects and Keywords","entries":[{"key":"dc:subject","label":"Dc Subject","values":["matrix converter","silicon carbide","surface mount device","power loop design","low inductance"]}]},{"id":"language_rights","label":"Language and Rights","entries":[{"key":"dc:rights","label":"Dc Rights","values":["In Copyright"]},{"key":"dc:rights.uri","label":"Rights URI","values":["http://rightsstatements.org/vocab/InC/1.0/"]}]},{"id":"identifiers","label":"Identifiers","entries":[{"key":"dc:identifier.other","label":"Dc Identifier Other","values":["vt_gsexam:31897"]},{"key":"dc:identifier.uri","label":"Identifier URI","values":["http://hdl.handle.net/10919/104361"]}]},{"id":"additional","label":"Additional Metadata","entries":[{"key":"dc:description.abstract","label":"Abstract","values":["This work investigates three-dimensional power loop layout for application to a SiC based matrix converter, providing a symmetric, low-inductance solution. The thesis presents various layout types to achieve this design target, and details the implementation of a hybrid layout to the matrix converter phase-leg. This layout is more easily achievable with a surface-mount device package, which also offers benefits such as ease in manufacturing, and a compact package. In order to implement a surface-mount device, a PCB thermal management strategy should be utilized. An evaluation of these methods is also presented in the work. The final power loop solution that implements an aluminum nitride inlay is evaluated through simulated parasitic extraction and experimental double pulse tests. The layout achieves small, symmetric loop inductances. Finally, the full power, three-phase matrix converter demonstrates the successful implementation of this power loop layout."]},{"key":"dc:description.abstractgeneral","label":"General Abstract","values":["In the United States, 40% primary energy consumption comes from electricity generation, which is the fastest growing form of end-use energy. Industries such as commercial airlines are increasing their use of electric energy, while phasing out the mechanical and pneumatic aircraft components, as they offer better performance and lower cost. Thus, implementation of high efficiency, electrical system can reduce energy consumption, fuel consumption and carbon emissions [1]. As more systems rely on this electric power, the conversion from one level of power (voltage and current) to another, is critical. In the quest to develop high efficiency power converters, wide bandgap semiconductor devices are being turned to. These devices, specifically Silicon Carbide (SiC) devices, offer high temperature and high voltage operation that a traditional Silicon (Si) device cannot. Coupled with fast switching transients, these metal oxide semiconductors field effect transistors (MOSFETs), could provide higher levels of efficiency and power density. This work investigates the benefits of a three-dimensional (3D) printed circuit board (PCB) layout. With this type of layout, a critical parasitic – inductance – can be minimized. As the SiC device can operate at high switching speeds, they incur higher di/dt, and dv/dt slew rates. If trace inductance is not minimal, overshoots and ringing will occur. This can be addressed by stacking PCB traces on top of one another, the induced magnetic field can be reduced. In turn, the system inductance is lowered as well. The reduction of this parameter in the system, reduces the overshoot and ringing. This particular work applies this technique to a 15kW matrix converter. This converter poses a particular design challenge as there are a large number of devices, which can lead to longer, higher inductance PCB traces. The goal of this work is to minimize the parasitic inductance in this converter for high efficiency, high power density operation."]},{"key":"dc:description.degree","label":"Dc Description Degree","values":["Master of Science"]},{"key":"dc:format.medium","label":"Dc Format Medium","values":["ETD"]},{"key":"dc:title","label":"Title","values":["3D Commutation-Loop Design Methodology for a SiC Based Matrix Converter run in Step-up mode with PCB Aluminum Nitride Cooling Inlay"]}]}],"canonical_facts":{"dc:contributor.committeechair":["Burgos, Rolando"],"dc:contributor.committeemember":["Dong, Dong","Wen, Bo"],"dc:contributor.department":["Electrical Engineering"],"dc:creator":["Baker, Victoria Isabelle"],"dc:date.accessioned":["2021-07-23T08:00:20Z"],"dc:date.available":["2021-07-23T08:00:20Z"],"dc:date.issued":["2021-07-22"],"dc:description.abstract":["This work investigates three-dimensional power loop layout for application to a SiC based matrix converter, providing a symmetric, low-inductance solution. The thesis presents various layout types to achieve this design target, and details the implementation of a hybrid layout to the matrix converter phase-leg. This layout is more easily achievable with a surface-mount device package, which also offers benefits such as ease in manufacturing, and a compact package. In order to implement a surface-mount device, a PCB thermal management strategy should be utilized. An evaluation of these methods is also presented in the work. The final power loop solution that implements an aluminum nitride inlay is evaluated through simulated parasitic extraction and experimental double pulse tests. The layout achieves small, symmetric loop inductances. Finally, the full power, three-phase matrix converter demonstrates the successful implementation of this power loop layout."],"dc:description.abstractgeneral":["In the United States, 40% primary energy consumption comes from electricity generation, which is the fastest growing form of end-use energy. Industries such as commercial airlines are increasing their use of electric energy, while phasing out the mechanical and pneumatic aircraft components, as they offer better performance and lower cost. Thus, implementation of high efficiency, electrical system can reduce energy consumption, fuel consumption and carbon emissions [1]. As more systems rely on this electric power, the conversion from one level of power (voltage and current) to another, is critical. In the quest to develop high efficiency power converters, wide bandgap semiconductor devices are being turned to. These devices, specifically Silicon Carbide (SiC) devices, offer high temperature and high voltage operation that a traditional Silicon (Si) device cannot. Coupled with fast switching transients, these metal oxide semiconductors field effect transistors (MOSFETs), could provide higher levels of efficiency and power density. This work investigates the benefits of a three-dimensional (3D) printed circuit board (PCB) layout. With this type of layout, a critical parasitic – inductance – can be minimized. As the SiC device can operate at high switching speeds, they incur higher di/dt, and dv/dt slew rates. If trace inductance is not minimal, overshoots and ringing will occur. This can be addressed by stacking PCB traces on top of one another, the induced magnetic field can be reduced. In turn, the system inductance is lowered as well. The reduction of this parameter in the system, reduces the overshoot and ringing. This particular work applies this technique to a 15kW matrix converter. This converter poses a particular design challenge as there are a large number of devices, which can lead to longer, higher inductance PCB traces. The goal of this work is to minimize the parasitic inductance in this converter for high efficiency, high power density operation."],"dc:description.degree":["Master of Science"],"dc:format.medium":["ETD"],"dc:identifier.other":["vt_gsexam:31897"],"dc:identifier.uri":["http://hdl.handle.net/10919/104361"],"dc:publisher":["Virginia Tech"],"dc:rights":["In Copyright"],"dc:rights.uri":["http://rightsstatements.org/vocab/InC/1.0/"],"dc:subject":["matrix converter","silicon carbide","surface mount device","power loop design","low inductance"],"dc:title":["3D Commutation-Loop Design Methodology for a SiC Based Matrix Converter run in Step-up mode with PCB Aluminum Nitride Cooling Inlay"],"dc:type":["Thesis"],"thesis:degree_discipline":["Electrical Engineering"],"thesis:degree_level":["masters"],"thesis:degree_name":["Master of Science"],"thesis:institution_name":["Virginia Polytechnic Institute and State University"]},"updated_at":"2026-07-22T22:20:00Z"}