{"id":{"repo_id":"vt","oai_identifier":"oai:vtechworks.lib.vt.edu:10919/101213"},"canonical_url":"https://search.dev.ndltd.org/etd/vt/oai:vtechworks.lib.vt.edu:10919/101213","repository":{"repo_id":"vt","name":"Virginia Tech","base_url":"https://vtechworks.lib.vt.edu/oai/request"},"display":{"title":"Optimum implementation of BCH codes","abstract":"The Bose-Chaudhuri-Hocquenghem (BCH) codes are best constructive codes for channels in which error affect successive symbols independently. The binary BCH codes, a subclass of BCH codes, are known to have good random error correcting capability and Reed-Solomon (RS) codes, an important subclass of BCH codes, have very good burst error correcting capability. A concatenation of these two codes, the binary BCH/RS concatenated codes, can correct both random and burst errors. The decoding procedure for these codes is well documented. However not much work has been done on the implementation of the decoding procedure. This thesis deals with development of configurations for decoding binary BCH codes, RS codes and BCH/RS concatenated codes. The decoding procedure is first described. Sample calculations are shown to explain the decoding procedure. The decoding procedure consists of (1) 3 major steps for binary BCH codes and (2) 4 major steps for RS codes. Each of these steps can be implemented by either hardware or software, but the efficiency varies between the specific steps of the de- coding procedure. For each step, both hardware and software implementations are discussed. The complexity and decoding delay for both methods of implementation are determined. The optimal combination, which offers fast execution time and overall system simplicity, is presented. A new procedure for designing BCH/RS concatenated codes is developed and presented in Chapter VI. The advantages of this new procedure are also discussed in Chapter VI.","abstract_html":"The Bose-Chaudhuri-Hocquenghem (BCH) codes are best constructive codes for channels in which error affect successive symbols independently. The binary BCH codes, a subclass of BCH codes, are known to have good random error correcting capability and Reed-Solomon (RS) codes, an important subclass of BCH codes, have very good burst error correcting capability. A concatenation of these two codes, the binary BCH/RS concatenated codes, can correct both random and burst errors. The decoding procedure for these codes is well documented. However not much work has been done on the implementation of the decoding procedure. This thesis deals with development of configurations for decoding binary BCH codes, RS codes and BCH/RS concatenated codes. The decoding procedure is first described. Sample calculations are shown to explain the decoding procedure. The decoding procedure consists of (1) 3 major steps for binary BCH codes and (2) 4 major steps for RS codes. Each of these steps can be implemented by either hardware or software, but the efficiency varies between the specific steps of the de- coding procedure. For each step, both hardware and software implementations are discussed. The complexity and decoding delay for both methods of implementation are determined. The optimal combination, which offers fast execution time and overall system simplicity, is presented. A new procedure for designing BCH/RS concatenated codes is developed and presented in Chapter VI. The advantages of this new procedure are also discussed in Chapter VI.","abstract_has_math":false,"creators":["Kumar, G. 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The binary BCH codes, a subclass of BCH codes, are known to have good random error correcting capability and Reed-Solomon (RS) codes, an important subclass of BCH codes, have very good burst error correcting capability. A concatenation of these two codes, the binary BCH/RS concatenated codes, can correct both random and burst errors. The decoding procedure for these codes is well documented. However not much work has been done on the implementation of the decoding procedure. This thesis deals with development of configurations for decoding binary BCH codes, RS codes and BCH/RS concatenated codes. The decoding procedure is first described. Sample calculations are shown to explain the decoding procedure. The decoding procedure consists of (1) 3 major steps for binary BCH codes and (2) 4 major steps for RS codes. Each of these steps can be implemented by either hardware or software, but the efficiency varies between the specific steps of the de- coding procedure. For each step, both hardware and software implementations are discussed. The complexity and decoding delay for both methods of implementation are determined. The optimal combination, which offers fast execution time and overall system simplicity, is presented. A new procedure for designing BCH/RS concatenated codes is developed and presented in Chapter VI. The advantages of this new procedure are also discussed in Chapter VI."]},{"key":"dc:description.degree","label":"Dc Description Degree","values":["M.S."]},{"key":"dc:format.mimetype","label":"Dc Format Mimetype","values":["application/pdf"]},{"key":"dc:title","label":"Title","values":["Optimum implementation of BCH codes"]}]}],"canonical_facts":{"dc:contributor.department":["Electrical Engineering"],"dc:creator":["Kumar, G. A."],"dc:date.accessioned":["2020-12-14T16:34:51Z"],"dc:date.available":["2020-12-14T16:34:51Z"],"dc:date.issued":["1983"],"dc:description.abstract":["The Bose-Chaudhuri-Hocquenghem (BCH) codes are best constructive codes for channels in which error affect successive symbols independently. The binary BCH codes, a subclass of BCH codes, are known to have good random error correcting capability and Reed-Solomon (RS) codes, an important subclass of BCH codes, have very good burst error correcting capability. A concatenation of these two codes, the binary BCH/RS concatenated codes, can correct both random and burst errors. The decoding procedure for these codes is well documented. However not much work has been done on the implementation of the decoding procedure. This thesis deals with development of configurations for decoding binary BCH codes, RS codes and BCH/RS concatenated codes. The decoding procedure is first described. Sample calculations are shown to explain the decoding procedure. The decoding procedure consists of (1) 3 major steps for binary BCH codes and (2) 4 major steps for RS codes. Each of these steps can be implemented by either hardware or software, but the efficiency varies between the specific steps of the de- coding procedure. For each step, both hardware and software implementations are discussed. The complexity and decoding delay for both methods of implementation are determined. The optimal combination, which offers fast execution time and overall system simplicity, is presented. A new procedure for designing BCH/RS concatenated codes is developed and presented in Chapter VI. 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