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Universiti Tun Hussein Onn Malaysia

Experimental demonstration of cap transmitter using very high speed IC hardware description language (VHDL)

Abstract

dc:description.abstract

Carrierless Amplitude Phase (CAP) Modulation is a multidimensional and multilevel of modulation scheme which it is strongly inspired by QAM modulation scheme. CAP does not depend on a carrier and it is much simpler. Lots of CAP modulation experiments have been proposed and demonstrate but none of them were introduced in real time system. Therefore Very High Speed IC Hardware Description Language (VHDL) has been chosen as a method to investigate the modulation of CAP transmitter in real time. This project focused on 2D CAP transmitter implementation in VHDL. The aim of this project is to investigate the CAP transmitter modulation by using Fast Fourier Transform (FFT) and implement the core signal processing blocks using VHDL. Therefore 4 selected blocks of CAP transmitter: random generator, constellation mapper, modulation and Inverse Fast Fourier Transform (IFFT) were designed and analyzed. Then they were compared to the theory of CAP modulation and Quadrature Amplitude Modulation (QAM).The transition table was created based on modulation theory for proofing purposed. Quartus II has been used for simulation in implementing 4 RAMs, 1 radix butterfly and designing an IFFT. 3 stages were connected with each other using CORDIC algorithm and 23 multiplexers. We believe that this project is a good start for implementing 2D-CAP in the real time. Real time is good because it is timeliness, fast, low loss rate, low end to end delay and very cost effectively.

Degree

thesis:*
Name dc:type.qualificationname
mphil
Level dc:type.qualificationlevel
masters
Grantor dc:publisher.institution
Universiti Tun Hussein Onn Malaysia
Year dc:date.issued
2015

Author and committee

dc:creator, dc:contributor.*
Author dc:creator
  • Yusoff, Yusmahaida

Subjects

dc:subject × 1

Rights

Language dc:language
en

Chain of custody

source
Harvested from
Universiti Tun Hussein Onn Malaysia
Base URL
eprints.uthm.edu.my/cgi/oai2
Last updated
2026-07-24
Source record
OAI-PMH GetRecord
citation

Yusoff, Yusmahaida. Experimental demonstration of cap transmitter using very high speed IC hardware description language (VHDL). masters thesis, Universiti Tun Hussein Onn Malaysia, 2015.