Hardware thread management modeling for precision timed processors

Studies recently and currently in progress address timing demands for Cyber Physical Systems (CPS) applications. Certain areas of research seek to modify modern computer architecture to meet the needs of CPS applications. Moreover, specific modifications in current computer architecture have produced newer computer architectures and processors, such as precision timed (PRET) processors. This thesis focuses on identifying, modeling, and simulating thread management methods in hardware used by the current open-source PRET soft processor, the MultiFire.

Grantor dc:publisher

University of Tennessee at Chattanooga

Author dc:creator

• Norwood, David Edward

Contributors dc:contributor

• Craven, Stephen D.
• Ofoli, Abdul; Sartipi, Mina
• College of Engineering and Computer Science

• Adaptive computing systems

Licence

• https://rightsstatements.org/page/InC/1.0/?language=en

Language dc:language

English, eng

Repository record dc:identifier

https://scholar.utc.edu/theses/56

OAI identifier oai:identifier

oai:scholar.utc.edu:theses-1058