A nano-CMOS based universal voltage level converter for multi-VDD SoCs.

Power dissipation of integrated circuits is the most demanding issue for very large scale integration (VLSI) design engineers, especially for portable and mobile applications. Use of multiple supply voltages systems, which employs level converter between two voltage islands is one of the most effective ways to reduce power consumption. In this thesis work, a unique level converter known as universal level converter (ULC), capable of four distinct level converting operations, is proposed. The schematic and layout of ULC are built and simulated using CADENCE. The ULC is characterized by performing three analysis such as parametric, power, and load analysis which prove that the design has an average power consumption reduction of about 85-97% and capable of producing stable output at low voltages like 0.45V even under varying load conditions.

Grantor dc:publisher

University of North Texas

Year dc:date

2007

Author dc:creator

• Vadlmudi, Tripurasuparna

Contributors dc:contributor

• Mohanty, Saraju P.
• Kougianos, Elias
• Mikler, Armin R.

• level converter
• power dissipation
• reduction design
• 90nm & 45nm technology
• parametric analysis
• Electric current converters.
• Metal oxide semiconductors, Complementary.
• Integrated circuits -- Very large scale integration.

Statement dc:rights

• Public
• Copyright
• Vadlmudi, Tripurasuparna
• Copyright is held by the author, unless otherwise noted. All rights reserved.

Language dc:language

English

Identifier

oclc: 176630853
https://digital.library.unt.edu/ark:/67531/metadc3602/
ark: ark:/67531/metadc3602

OAI identifier oai:identifier

info:ark/67531/metadc3602