{"id":{"repo_id":"unm","oai_identifier":"oai:digitalrepository.unm.edu:ece_etds-1149"},"canonical_url":"https://search.dev.ndltd.org/etd/unm/oai:digitalrepository.unm.edu:ece_etds-1149","repository":{"repo_id":"unm","name":"University of New Mexico","base_url":"https://digitalrepository.unm.edu/do/oai/"},"display":{"title":"Measuring and tuning energy efficiency on large scale high performance computing platforms","abstract":"Recognition of the importance of power in the field of High Performance Computing, whether it be as an obstacle, expense or design consideration, has never been greater and more pervasive. Research has been conducted in a number of areas related to power. Little, if any, existing research has focused on large scale High Performance Computing. Part of the reason is the lack of measurement capability currently available on small or large platforms. Typically, research is conducted using coarse methods of measurement such as inserting a power meter between the power source and the platform, or fine grained measurements using custom instrumented boards (with obvious limitations in scale). To collect the measurements necessary to analyze real scientific computing applications at large scale, an in-situ measurement capability must exist on a large scale capability class platform. In response to this challenge, the unique power measurement capabilities of the Cray XT architecture were exploited to gain an understanding of power use and the effects of tuning both CPU and network bandwidth. Modifications were made at the operating system level to deterministically halt cores when idle. Additionally, capabilities to alter operating P-state were added. At the application level, an understanding of the power requirements of a range of important DOE/NNSA production scientific computing applications running at large scale (thousands of nodes) is gained, by simultaneously collecting current and voltage measurements on the hosting nodes. The effects of both CPU and network bandwidth tuning are examined and energy savings opportunities of up to 39% with little or no impact on run-time performance is demonstrated. Capturing scale effects was key. This thesis provides strong evidence that next generation large-scale platforms should not only approach CPU frequency scaling differently, but could also benefit from the capability to tune other platform components, such as the network, to achieve energy efficient performance.","abstract_html":"Recognition of the importance of power in the field of High Performance Computing, whether it be as an obstacle, expense or design consideration, has never been greater and more pervasive. Research has been conducted in a number of areas related to power. Little, if any, existing research has focused on large scale High Performance Computing. Part of the reason is the lack of measurement capability currently available on small or large platforms. Typically, research is conducted using coarse methods of measurement such as inserting a power meter between the power source and the platform, or fine grained measurements using custom instrumented boards (with obvious limitations in scale). To collect the measurements necessary to analyze real scientific computing applications at large scale, an in-situ measurement capability must exist on a large scale capability class platform. In response to this challenge, the unique power measurement capabilities of the Cray XT architecture were exploited to gain an understanding of power use and the effects of tuning both CPU and network bandwidth. Modifications were made at the operating system level to deterministically halt cores when idle. Additionally, capabilities to alter operating P-state were added. At the application level, an understanding of the power requirements of a range of important DOE/NNSA production scientific computing applications running at large scale (thousands of nodes) is gained, by simultaneously collecting current and voltage measurements on the hosting nodes. The effects of both CPU and network bandwidth tuning are examined and energy savings opportunities of up to 39% with little or no impact on run-time performance is demonstrated. Capturing scale effects was key. This thesis provides strong evidence that next generation large-scale platforms should not only approach CPU frequency scaling differently, but could also benefit from the capability to tune other platform components, such as the network, to achieve energy efficient performance.","abstract_has_math":false,"creators":["Laros, James Howard, III"],"institution":null,"degree_name":"Computer Engineering","degree_level":"Thesis","degree_discipline":"Electrical and Computer Engineering","degree_department":null,"school":null,"contributors":["Shu, Wei","Pollard, Howard","Ang, James"],"advisors":[],"committee_chairs":[],"committee_members":[],"year":2012,"date_issued":"2012-07-02T07:00:00Z","date_published":"2012-07-02T07:00:00Z","updated_at":"2026-07-24T05:27:19Z","subjects":["Computer platforms--Energy consumption--Measurement","High performance processors--Energy consumption--Measurement","High performance computing."],"languages":["English"],"rights":[],"rights_urls":[],"identifier_entries":[]},"links":{"outbound_url":"https://digitalrepository.unm.edu/ece_etds/150","outbound_label":"Repository record","outbound_source":"dc:identifier"},"metadata_groups":[{"id":"people","label":"People","entries":[{"key":"dc:contributor","label":"Contributor","values":["Shu, Wei","Pollard, Howard","Ang, James"]},{"key":"dc:creator","label":"Author","values":["Laros, James Howard, III"]}]},{"id":"academic_context","label":"Academic Context","entries":[{"key":"thesis:degree_discipline","label":"Discipline","values":["Electrical and Computer Engineering"]},{"key":"thesis:degree_level","label":"Degree Level","values":["Thesis","Masters"]},{"key":"thesis:degree_name","label":"Degree Name","values":["Computer Engineering"]}]},{"id":"subjects_keywords","label":"Subjects and Keywords","entries":[{"key":"dc:subject","label":"Dc Subject","values":["Computer platforms--Energy consumption--Measurement","High performance processors--Energy consumption--Measurement","High performance computing."]}]},{"id":"language_rights","label":"Language and Rights","entries":[{"key":"dc:language","label":"Dc Language","values":["English"]}]},{"id":"identifiers","label":"Identifiers","entries":[{"key":"dc:identifier","label":"Identifier","values":["https://digitalrepository.unm.edu/ece_etds/150"]}]},{"id":"additional","label":"Additional Metadata","entries":[{"key":"dc:description.abstract","label":"Abstract","values":["Recognition of the importance of power in the field of High Performance Computing, whether it be as an obstacle, expense or design consideration, has never been greater and more pervasive. Research has been conducted in a number of areas related to power. Little, if any, existing research has focused on large scale High Performance Computing. Part of the reason is the lack of measurement capability currently available on small or large platforms. Typically, research is conducted using coarse methods of measurement such as inserting a power meter between the power source and the platform, or fine grained measurements using custom instrumented boards (with obvious limitations in scale). To collect the measurements necessary to analyze real scientific computing applications at large scale, an in-situ measurement capability must exist on a large scale capability class platform. In response to this challenge, the unique power measurement capabilities of the Cray XT architecture were exploited to gain an understanding of power use and the effects of tuning both CPU and network bandwidth. Modifications were made at the operating system level to deterministically halt cores when idle. Additionally, capabilities to alter operating P-state were added. At the application level, an understanding of the power requirements of a range of important DOE/NNSA production scientific computing applications running at large scale (thousands of nodes) is gained, by simultaneously collecting current and voltage measurements on the hosting nodes. The effects of both CPU and network bandwidth tuning are examined and energy savings opportunities of up to 39% with little or no impact on run-time performance is demonstrated. Capturing scale effects was key. This thesis provides strong evidence that next generation large-scale platforms should not only approach CPU frequency scaling differently, but could also benefit from the capability to tune other platform components, such as the network, to achieve energy efficient performance."]},{"key":"dc:title","label":"Title","values":["Measuring and tuning energy efficiency on large scale high performance computing platforms"]}]}],"canonical_facts":{"dc:contributor":["Shu, Wei","Pollard, Howard","Ang, James"],"dc:creator":["Laros, James Howard, III"],"dc:description.abstract":["Recognition of the importance of power in the field of High Performance Computing, whether it be as an obstacle, expense or design consideration, has never been greater and more pervasive. Research has been conducted in a number of areas related to power. Little, if any, existing research has focused on large scale High Performance Computing. Part of the reason is the lack of measurement capability currently available on small or large platforms. Typically, research is conducted using coarse methods of measurement such as inserting a power meter between the power source and the platform, or fine grained measurements using custom instrumented boards (with obvious limitations in scale). To collect the measurements necessary to analyze real scientific computing applications at large scale, an in-situ measurement capability must exist on a large scale capability class platform. In response to this challenge, the unique power measurement capabilities of the Cray XT architecture were exploited to gain an understanding of power use and the effects of tuning both CPU and network bandwidth. Modifications were made at the operating system level to deterministically halt cores when idle. Additionally, capabilities to alter operating P-state were added. At the application level, an understanding of the power requirements of a range of important DOE/NNSA production scientific computing applications running at large scale (thousands of nodes) is gained, by simultaneously collecting current and voltage measurements on the hosting nodes. The effects of both CPU and network bandwidth tuning are examined and energy savings opportunities of up to 39% with little or no impact on run-time performance is demonstrated. Capturing scale effects was key. This thesis provides strong evidence that next generation large-scale platforms should not only approach CPU frequency scaling differently, but could also benefit from the capability to tune other platform components, such as the network, to achieve energy efficient performance."],"dc:identifier":["https://digitalrepository.unm.edu/ece_etds/150"],"dc:language":["English"],"dc:subject":["Computer platforms--Energy consumption--Measurement","High performance processors--Energy consumption--Measurement","High performance computing."],"dc:title":["Measuring and tuning energy efficiency on large scale high performance computing platforms"],"thesis:degree_discipline":["Electrical and Computer Engineering"],"thesis:degree_level":["Thesis","Masters"],"thesis:degree_name":["Computer Engineering"]},"updated_at":"2026-07-24T05:27:19Z"}