{"id":{"repo_id":"uiuc","oai_identifier":"oai:www.ideals.illinois.edu:2142/81926"},"canonical_url":"https://search.dev.ndltd.org/etd/uiuc/oai:www.ideals.illinois.edu:2142/81926","repository":{"repo_id":"uiuc","name":"University of Illinois - Urbana-Champaign","base_url":"https://www.ideals.illinois.edu/oai-pmh"},"display":{"title":"Logic Synthesis for Engineering Changes","abstract":"In the optimization phase, the Transduction method and the delay-reducing/delay-restricted Transduction method are employed to minimize the area or delay of the already rectified network. Compatible sets of permissible functions are utilized to increase the effectiveness of optimization. The final network produced by SYLON-EC is both rectified and optimized.","abstract_html":"In the optimization phase, the Transduction method and the delay-reducing/delay-restricted Transduction method are employed to minimize the area or delay of the already rectified network. Compatible sets of permissible functions are utilized to increase the effectiveness of optimization. The final network produced by SYLON-EC is both rectified and optimized.","abstract_has_math":false,"creators":["Hsieh, Chang-Chao"],"institution":"University of Illinois at Urbana-Champaign","degree_name":"Ph.D.","degree_level":"Dissertation","degree_discipline":"Computer Science","degree_department":null,"school":null,"contributors":["Muroga, Saburo"],"advisors":[],"committee_chairs":[],"committee_members":[],"year":1998,"date_issued":"1998","date_published":"1998","updated_at":"2026-07-22T22:26:17Z","subjects":["Engineering, Electronics and Electrical"],"languages":["eng"],"rights":[],"rights_urls":[],"identifier_entries":[{"key":"dc:identifier","label":"Identifier","values":["(MiAaPQ)AAI9912270"],"render_values":[{"text":"(MiAaPQ)AAI9912270","href":null,"code":true}]}]},"links":{"outbound_url":"http://hdl.handle.net/2142/81926","outbound_label":"Handle","outbound_source":"dc:identifier"},"metadata_groups":[{"id":"people","label":"People","entries":[{"key":"dc:contributor","label":"Contributor","values":["Muroga, Saburo"]},{"key":"dc:creator","label":"Author","values":["Hsieh, Chang-Chao"]}]},{"id":"academic_context","label":"Academic Context","entries":[{"key":"dc:date","label":"Dc Date","values":["1998","2015-09-25T20:21:01Z","10000-01-01"]},{"key":"dc:type","label":"Dc Type","values":["text"]},{"key":"thesis:degree_discipline","label":"Discipline","values":["Computer Science"]},{"key":"thesis:degree_level","label":"Degree Level","values":["Dissertation"]},{"key":"thesis:degree_name","label":"Degree Name","values":["Ph.D."]},{"key":"thesis:institution_name","label":"Thesis Institution Name","values":["University of Illinois at Urbana-Champaign"]}]},{"id":"subjects_keywords","label":"Subjects and Keywords","entries":[{"key":"dc:subject","label":"Dc Subject","values":["Engineering, Electronics and Electrical"]}]},{"id":"language_rights","label":"Language and Rights","entries":[{"key":"dc:language","label":"Dc Language","values":["eng"]}]},{"id":"identifiers","label":"Identifiers","entries":[{"key":"dc:identifier","label":"Identifier","values":["http://hdl.handle.net/2142/81926","(MiAaPQ)AAI9912270"]}]},{"id":"additional","label":"Additional Metadata","entries":[{"key":"dc:description","label":"Description","values":["In the optimization phase, the Transduction method and the delay-reducing/delay-restricted Transduction method are employed to minimize the area or delay of the already rectified network. Compatible sets of permissible functions are utilized to increase the effectiveness of optimization. The final network produced by SYLON-EC is both rectified and optimized.","Made available in DSpace on 2015-09-25T20:21:01Z (GMT). No. of bitstreams: 2 license.txt: 4848 bytes, checksum: 96035ab3f5e1c23cc7138a224ce498bd (MD5) 9912270.pdf: 9358830 bytes, checksum: c82179015c1c8d926ed62091015c4b9e (MD5) Previous issue date: 1998","Embargo set by: Seth Robbins for item 83207 Lift date: Forever Reason: Restricted to the U of I community idenfinitely during batch ingest of legacy ETDs","Restricted to the U of I community idenfinitely during batch ingest of legacy ETDs","U of I Only","217 p.","Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 1998."]},{"key":"dc:title","label":"Title","values":["Logic Synthesis for Engineering Changes"]}]}],"canonical_facts":{"dc:contributor":["Muroga, Saburo"],"dc:creator":["Hsieh, Chang-Chao"],"dc:date":["1998","2015-09-25T20:21:01Z","10000-01-01"],"dc:description":["In the optimization phase, the Transduction method and the delay-reducing/delay-restricted Transduction method are employed to minimize the area or delay of the already rectified network. Compatible sets of permissible functions are utilized to increase the effectiveness of optimization. The final network produced by SYLON-EC is both rectified and optimized.","Made available in DSpace on 2015-09-25T20:21:01Z (GMT). No. of bitstreams: 2 license.txt: 4848 bytes, checksum: 96035ab3f5e1c23cc7138a224ce498bd (MD5) 9912270.pdf: 9358830 bytes, checksum: c82179015c1c8d926ed62091015c4b9e (MD5) Previous issue date: 1998","Embargo set by: Seth Robbins for item 83207 Lift date: Forever Reason: Restricted to the U of I community idenfinitely during batch ingest of legacy ETDs","Restricted to the U of I community idenfinitely during batch ingest of legacy ETDs","U of I Only","217 p.","Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 1998."],"dc:identifier":["http://hdl.handle.net/2142/81926","(MiAaPQ)AAI9912270"],"dc:language":["eng"],"dc:subject":["Engineering, Electronics and Electrical"],"dc:title":["Logic Synthesis for Engineering Changes"],"dc:type":["text"],"thesis:degree_discipline":["Computer Science"],"thesis:degree_level":["Dissertation"],"thesis:degree_name":["Ph.D."],"thesis:institution_name":["University of Illinois at Urbana-Champaign"]},"updated_at":"2026-07-22T22:26:17Z"}