{"id":{"repo_id":"uiuc","oai_identifier":"oai:www.ideals.illinois.edu:2142/81349"},"canonical_url":"https://search.dev.ndltd.org/etd/uiuc/oai:www.ideals.illinois.edu:2142/81349","repository":{"repo_id":"uiuc","name":"University of Illinois - Urbana-Champaign","base_url":"https://www.ideals.illinois.edu/oai-pmh"},"display":{"title":"Low-Power Reconfigurable Digital Signal Processing","abstract":"We present a design methodology for low-power communication systems. This is based on the concept of DAT and intellectual property (IP) core generators. Energy-optimum parameters are obtained via DAT, and are fed into IP core generators, which generate a synthesizable VHDL description of the IP core. The IP cores are synthesized via commercial logic synthesis tools. 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