{"id":{"repo_id":"uiuc","oai_identifier":"oai:www.ideals.illinois.edu:2142/81250"},"canonical_url":"https://search.dev.ndltd.org/etd/uiuc/oai:www.ideals.illinois.edu:2142/81250","repository":{"repo_id":"uiuc","name":"University of Illinois - Urbana-Champaign","base_url":"https://www.ideals.illinois.edu/oai-pmh"},"display":{"title":"High-Level Power Estimation","abstract":"High-level power estimation requires high-level predictions of circuit average activity, area, and delay, in order to estimate power. The main contribution of this research is development of predictors (estimators) for activity, area, and delay for combinational circuits, thus making it possible to estimate power at the RT level. All of the above predictors work with a functional description of the design and avoid the time consuming translation of the RT description into a circuit-level description, thus making them fast, which in turn enables the designer to explore the area, delay, and power space early in the design.","abstract_html":"High-level power estimation requires high-level predictions of circuit average activity, area, and delay, in order to estimate power. The main contribution of this research is development of predictors (estimators) for activity, area, and delay for combinational circuits, thus making it possible to estimate power at the RT level. All of the above predictors work with a functional description of the design and avoid the time consuming translation of the RT description into a circuit-level description, thus making them fast, which in turn enables the designer to explore the area, delay, and power space early in the design.","abstract_has_math":false,"creators":["Nemani, Mahadevamurty"],"institution":"University of Illinois at Urbana-Champaign","degree_name":"Ph.D.","degree_level":"Dissertation","degree_discipline":"Electrical Engineering","degree_department":null,"school":null,"contributors":["Farid N. Najm"],"advisors":[],"committee_chairs":[],"committee_members":[],"year":2015,"date_issued":"2015-09-25T20:10:15Z","date_published":"2015-09-25T20:10:15Z","updated_at":"2026-07-22T22:26:15Z","subjects":["Engineering, Electronics and Electrical"],"languages":["eng"],"rights":[],"rights_urls":[],"identifier_entries":[{"key":"dc:identifier","label":"Identifier","values":["(MiAaPQ)AAI9904547"],"render_values":[{"text":"(MiAaPQ)AAI9904547","href":null,"code":true}]}]},"links":{"outbound_url":"http://hdl.handle.net/2142/81250","outbound_label":"Handle","outbound_source":"dc:identifier"},"metadata_groups":[{"id":"people","label":"People","entries":[{"key":"dc:contributor","label":"Contributor","values":["Farid N. Najm"]},{"key":"dc:creator","label":"Author","values":["Nemani, Mahadevamurty"]}]},{"id":"academic_context","label":"Academic Context","entries":[{"key":"dc:date","label":"Dc Date","values":["2015-09-25T20:10:15Z","10000-01-01","1998"]},{"key":"dc:type","label":"Dc Type","values":["text"]},{"key":"thesis:degree_discipline","label":"Discipline","values":["Electrical Engineering"]},{"key":"thesis:degree_level","label":"Degree Level","values":["Dissertation"]},{"key":"thesis:degree_name","label":"Degree Name","values":["Ph.D."]},{"key":"thesis:institution_name","label":"Thesis Institution Name","values":["University of Illinois at Urbana-Champaign"]}]},{"id":"subjects_keywords","label":"Subjects and Keywords","entries":[{"key":"dc:subject","label":"Dc Subject","values":["Engineering, Electronics and Electrical"]}]},{"id":"language_rights","label":"Language and Rights","entries":[{"key":"dc:language","label":"Dc Language","values":["eng"]}]},{"id":"identifiers","label":"Identifiers","entries":[{"key":"dc:identifier","label":"Identifier","values":["http://hdl.handle.net/2142/81250","(MiAaPQ)AAI9904547"]}]},{"id":"additional","label":"Additional Metadata","entries":[{"key":"dc:description","label":"Description","values":["High-level power estimation requires high-level predictions of circuit average activity, area, and delay, in order to estimate power. The main contribution of this research is development of predictors (estimators) for activity, area, and delay for combinational circuits, thus making it possible to estimate power at the RT level. All of the above predictors work with a functional description of the design and avoid the time consuming translation of the RT description into a circuit-level description, thus making them fast, which in turn enables the designer to explore the area, delay, and power space early in the design.","Made available in DSpace on 2015-09-25T20:10:15Z (GMT). No. of bitstreams: 2 license.txt: 4848 bytes, checksum: 96035ab3f5e1c23cc7138a224ce498bd (MD5) 9904547.pdf: 6857464 bytes, checksum: 565e30e5930624c3e423ccc0407163c2 (MD5) Previous issue date: 1998","Embargo set by: Seth Robbins for item 82531 Lift date: Forever Reason: Restricted to the U of I community idenfinitely during batch ingest of legacy ETDs","Restricted to the U of I community idenfinitely during batch ingest of legacy ETDs","U of I Only","146 p.","Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 1998."]},{"key":"dc:title","label":"Title","values":["High-Level Power Estimation"]}]}],"canonical_facts":{"dc:contributor":["Farid N. Najm"],"dc:creator":["Nemani, Mahadevamurty"],"dc:date":["2015-09-25T20:10:15Z","10000-01-01","1998"],"dc:description":["High-level power estimation requires high-level predictions of circuit average activity, area, and delay, in order to estimate power. The main contribution of this research is development of predictors (estimators) for activity, area, and delay for combinational circuits, thus making it possible to estimate power at the RT level. All of the above predictors work with a functional description of the design and avoid the time consuming translation of the RT description into a circuit-level description, thus making them fast, which in turn enables the designer to explore the area, delay, and power space early in the design.","Made available in DSpace on 2015-09-25T20:10:15Z (GMT). No. of bitstreams: 2 license.txt: 4848 bytes, checksum: 96035ab3f5e1c23cc7138a224ce498bd (MD5) 9904547.pdf: 6857464 bytes, checksum: 565e30e5930624c3e423ccc0407163c2 (MD5) Previous issue date: 1998","Embargo set by: Seth Robbins for item 82531 Lift date: Forever Reason: Restricted to the U of I community idenfinitely during batch ingest of legacy ETDs","Restricted to the U of I community idenfinitely during batch ingest of legacy ETDs","U of I Only","146 p.","Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 1998."],"dc:identifier":["http://hdl.handle.net/2142/81250","(MiAaPQ)AAI9904547"],"dc:language":["eng"],"dc:subject":["Engineering, Electronics and Electrical"],"dc:title":["High-Level Power Estimation"],"dc:type":["text"],"thesis:degree_discipline":["Electrical Engineering"],"thesis:degree_level":["Dissertation"],"thesis:degree_name":["Ph.D."],"thesis:institution_name":["University of Illinois at Urbana-Champaign"]},"updated_at":"2026-07-22T22:26:15Z"}