{"id":{"repo_id":"uiuc","oai_identifier":"oai:www.ideals.illinois.edu:2142/80742"},"canonical_url":"https://search.dev.ndltd.org/etd/uiuc/oai:www.ideals.illinois.edu:2142/80742","repository":{"repo_id":"uiuc","name":"University of Illinois - Urbana-Champaign","base_url":"https://www.ideals.illinois.edu/oai-pmh"},"display":{"title":"Designing Low -Power Communication Systems via Noise-Tolerance","abstract":"We develop the soft-decision channel (SDC) model for deriving the lower bounds on energy dissipation of noisy digital systems. We compare the energy-efficiency bounds for domino and noise-tolerant dynamic circuits, and demonstrate that noise-tolerant techniques improve the energy-efficiency when operating at the lower bound. Furthermore, we show that the gap between the lower bounds and the actual energy dissipation is reduced significantly via noise-tolerance. We propose the metric of average noise threshold energy (ANTE) to quantify the noise-immunity and propose an energy-efficient, noise-tolerant dynamic circuit technique referred to as the mirror technique. Simulation results in a 0.35-mum CMOS technology are provided in comparison to static and domino circuits. A MAC ASIC design is presented along with the measured results. We investigate the reliability degradation due to leakage in two ∼0.1-mum CMOS technologies. Two performance metrics, unity noise gain (UNG) and four-stage delay, are proposed to quantify the noise-immunity and speed, respectively. We also propose an energy-efficient, noise-tolerant circuit technique, the boosted-source (BS) technique, for wide fan-in OR gates. We propose the adaptive error-cancellation (AEC) as a practical ANT technique suitable for low-power broadband signal processing. An energy-optimum AEC design strategy is proposed and extended to the design of multi-input, multi-output (MIMO) communication systems. Simulation results of a Gigabit Ethernet 1000Base-T transceiver are evaluated.","abstract_html":"We develop the soft-decision channel (SDC) model for deriving the lower bounds on energy dissipation of noisy digital systems. We compare the energy-efficiency bounds for domino and noise-tolerant dynamic circuits, and demonstrate that noise-tolerant techniques improve the energy-efficiency when operating at the lower bound. Furthermore, we show that the gap between the lower bounds and the actual energy dissipation is reduced significantly via noise-tolerance. We propose the metric of average noise threshold energy (ANTE) to quantify the noise-immunity and propose an energy-efficient, noise-tolerant dynamic circuit technique referred to as the mirror technique. Simulation results in a 0.35-mum CMOS technology are provided in comparison to static and domino circuits. A MAC ASIC design is presented along with the measured results. We investigate the reliability degradation due to leakage in two ∼0.1-mum CMOS technologies. Two performance metrics, unity noise gain (UNG) and four-stage delay, are proposed to quantify the noise-immunity and speed, respectively. We also propose an energy-efficient, noise-tolerant circuit technique, the boosted-source (BS) technique, for wide fan-in OR gates. We propose the adaptive error-cancellation (AEC) as a practical ANT technique suitable for low-power broadband signal processing. An energy-optimum AEC design strategy is proposed and extended to the design of multi-input, multi-output (MIMO) communication systems. Simulation results of a Gigabit Ethernet 1000Base-T transceiver are evaluated.","abstract_has_math":false,"creators":["Wang, Lei"],"institution":"University of Illinois at Urbana-Champaign","degree_name":"Ph.D.","degree_level":"Dissertation","degree_discipline":"Electrical Engineering","degree_department":null,"school":null,"contributors":["Shanbhag, Naresh R."],"advisors":[],"committee_chairs":[],"committee_members":[],"year":2015,"date_issued":"2015-09-25T20:07:56Z","date_published":"2015-09-25T20:07:56Z","updated_at":"2026-07-22T22:26:14Z","subjects":["Engineering, Electronics and Electrical"],"languages":["eng"],"rights":[],"rights_urls":[],"identifier_entries":[{"key":"dc:identifier","label":"Identifier","values":["(MiAaPQ)AAI3023227"],"render_values":[{"text":"(MiAaPQ)AAI3023227","href":null,"code":true}]}]},"links":{"outbound_url":"http://hdl.handle.net/2142/80742","outbound_label":"Handle","outbound_source":"dc:identifier"},"metadata_groups":[{"id":"people","label":"People","entries":[{"key":"dc:contributor","label":"Contributor","values":["Shanbhag, Naresh R."]},{"key":"dc:creator","label":"Author","values":["Wang, Lei"]}]},{"id":"academic_context","label":"Academic Context","entries":[{"key":"dc:date","label":"Dc Date","values":["2015-09-25T20:07:56Z","10000-01-01","2001"]},{"key":"dc:type","label":"Dc Type","values":["text"]},{"key":"thesis:degree_discipline","label":"Discipline","values":["Electrical Engineering"]},{"key":"thesis:degree_level","label":"Degree Level","values":["Dissertation"]},{"key":"thesis:degree_name","label":"Degree Name","values":["Ph.D."]},{"key":"thesis:institution_name","label":"Thesis Institution Name","values":["University of Illinois at Urbana-Champaign"]}]},{"id":"subjects_keywords","label":"Subjects and Keywords","entries":[{"key":"dc:subject","label":"Dc Subject","values":["Engineering, Electronics and Electrical"]}]},{"id":"language_rights","label":"Language and Rights","entries":[{"key":"dc:language","label":"Dc Language","values":["eng"]}]},{"id":"identifiers","label":"Identifiers","entries":[{"key":"dc:identifier","label":"Identifier","values":["http://hdl.handle.net/2142/80742","(MiAaPQ)AAI3023227"]}]},{"id":"additional","label":"Additional Metadata","entries":[{"key":"dc:description","label":"Description","values":["We develop the soft-decision channel (SDC) model for deriving the lower bounds on energy dissipation of noisy digital systems. We compare the energy-efficiency bounds for domino and noise-tolerant dynamic circuits, and demonstrate that noise-tolerant techniques improve the energy-efficiency when operating at the lower bound. Furthermore, we show that the gap between the lower bounds and the actual energy dissipation is reduced significantly via noise-tolerance. We propose the metric of average noise threshold energy (ANTE) to quantify the noise-immunity and propose an energy-efficient, noise-tolerant dynamic circuit technique referred to as the mirror technique. Simulation results in a 0.35-mum CMOS technology are provided in comparison to static and domino circuits. A MAC ASIC design is presented along with the measured results. We investigate the reliability degradation due to leakage in two ∼0.1-mum CMOS technologies. Two performance metrics, unity noise gain (UNG) and four-stage delay, are proposed to quantify the noise-immunity and speed, respectively. We also propose an energy-efficient, noise-tolerant circuit technique, the boosted-source (BS) technique, for wide fan-in OR gates. We propose the adaptive error-cancellation (AEC) as a practical ANT technique suitable for low-power broadband signal processing. An energy-optimum AEC design strategy is proposed and extended to the design of multi-input, multi-output (MIMO) communication systems. Simulation results of a Gigabit Ethernet 1000Base-T transceiver are evaluated.","Made available in DSpace on 2015-09-25T20:07:56Z (GMT). No. of bitstreams: 2 license.txt: 4848 bytes, checksum: 96035ab3f5e1c23cc7138a224ce498bd (MD5) 3023227.pdf: 6041147 bytes, checksum: 25e98862ccefabcdf382de471307dd52 (MD5) Previous issue date: 2001","Embargo set by: Seth Robbins for item 82024 Lift date: Forever Reason: Restricted to the U of I community idenfinitely during batch ingest of legacy ETDs","Restricted to the U of I community idenfinitely during batch ingest of legacy ETDs","U of I Only","130 p.","Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 2001."]},{"key":"dc:title","label":"Title","values":["Designing Low -Power Communication Systems via Noise-Tolerance"]}]}],"canonical_facts":{"dc:contributor":["Shanbhag, Naresh R."],"dc:creator":["Wang, Lei"],"dc:date":["2015-09-25T20:07:56Z","10000-01-01","2001"],"dc:description":["We develop the soft-decision channel (SDC) model for deriving the lower bounds on energy dissipation of noisy digital systems. We compare the energy-efficiency bounds for domino and noise-tolerant dynamic circuits, and demonstrate that noise-tolerant techniques improve the energy-efficiency when operating at the lower bound. Furthermore, we show that the gap between the lower bounds and the actual energy dissipation is reduced significantly via noise-tolerance. We propose the metric of average noise threshold energy (ANTE) to quantify the noise-immunity and propose an energy-efficient, noise-tolerant dynamic circuit technique referred to as the mirror technique. Simulation results in a 0.35-mum CMOS technology are provided in comparison to static and domino circuits. A MAC ASIC design is presented along with the measured results. We investigate the reliability degradation due to leakage in two ∼0.1-mum CMOS technologies. Two performance metrics, unity noise gain (UNG) and four-stage delay, are proposed to quantify the noise-immunity and speed, respectively. We also propose an energy-efficient, noise-tolerant circuit technique, the boosted-source (BS) technique, for wide fan-in OR gates. We propose the adaptive error-cancellation (AEC) as a practical ANT technique suitable for low-power broadband signal processing. An energy-optimum AEC design strategy is proposed and extended to the design of multi-input, multi-output (MIMO) communication systems. Simulation results of a Gigabit Ethernet 1000Base-T transceiver are evaluated.","Made available in DSpace on 2015-09-25T20:07:56Z (GMT). No. of bitstreams: 2 license.txt: 4848 bytes, checksum: 96035ab3f5e1c23cc7138a224ce498bd (MD5) 3023227.pdf: 6041147 bytes, checksum: 25e98862ccefabcdf382de471307dd52 (MD5) Previous issue date: 2001","Embargo set by: Seth Robbins for item 82024 Lift date: Forever Reason: Restricted to the U of I community idenfinitely during batch ingest of legacy ETDs","Restricted to the U of I community idenfinitely during batch ingest of legacy ETDs","U of I Only","130 p.","Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 2001."],"dc:identifier":["http://hdl.handle.net/2142/80742","(MiAaPQ)AAI3023227"],"dc:language":["eng"],"dc:subject":["Engineering, Electronics and Electrical"],"dc:title":["Designing Low -Power Communication Systems via Noise-Tolerance"],"dc:type":["text"],"thesis:degree_discipline":["Electrical Engineering"],"thesis:degree_level":["Dissertation"],"thesis:degree_name":["Ph.D."],"thesis:institution_name":["University of Illinois at Urbana-Champaign"]},"updated_at":"2026-07-22T22:26:14Z"}