{"id":{"repo_id":"uiuc","oai_identifier":"oai:www.ideals.illinois.edu:2142/73103"},"canonical_url":"https://search.dev.ndltd.org/etd/uiuc/oai:www.ideals.illinois.edu:2142/73103","repository":{"repo_id":"uiuc","name":"University of Illinois - Urbana-Champaign","base_url":"https://www.ideals.illinois.edu/oai-pmh"},"display":{"title":"The case for reconfigurable general purpose GPU computing","abstract":"General purpose graphics processing unit (GPU) computing (GPGPU) has emerged as a new paradigm for programmers to exploit massive amounts of parallelism for relatively low costs. The abundance of GPUs in desktop and mobile computing platforms makes them ideal for accelerating tasks on multiple devices. However, despite the massively parallel architecture, GPUs are limited by the applications that run on them. The generic architecture of a GPU allows it to accelerate a large variety of applications, but none of these applications are capable of exploiting the complete performance capabilities of the GPU. This underutilization results in wastage of resources and power. In this work, we propose to introduce reconfiguration to the GPU architecture in the hopes of being able to tune its architecture to maximize performance for a given application or redistribute resources so as to reduce power consumption.","abstract_html":"General purpose graphics processing unit (GPU) computing (GPGPU) has emerged as a new paradigm for programmers to exploit massive amounts of parallelism for relatively low costs. The abundance of GPUs in desktop and mobile computing platforms makes them ideal for accelerating tasks on multiple devices. However, despite the massively parallel architecture, GPUs are limited by the applications that run on them. The generic architecture of a GPU allows it to accelerate a large variety of applications, but none of these applications are capable of exploiting the complete performance capabilities of the GPU. This underutilization results in wastage of resources and power. In this work, we propose to introduce reconfiguration to the GPU architecture in the hopes of being able to tune its architecture to maximize performance for a given application or redistribute resources so as to reduce power consumption.","abstract_has_math":false,"creators":["Dhar, Ashutosh"],"institution":"University of Illinois at Urbana-Champaign","degree_name":"M.S.","degree_level":"Thesis","degree_discipline":"Electrical & Computer Engr","degree_department":null,"school":null,"contributors":["Chen, Deming"],"advisors":[],"committee_chairs":[],"committee_members":[],"year":2015,"date_issued":"2015-01-21T19:59:31Z","date_published":"2015-01-21T19:59:31Z","updated_at":"2026-07-22T22:26:07Z","subjects":["Graphics Processing Unit (GPU)","General Purpose Graphics Processing Unit (GPGPU)","Reconfigurable Computing","Architecture","Compute Unified Device Architecture (CUDA)"],"languages":["en"],"rights":["Copyright 2014 Ashutosh Dhar"],"rights_urls":[],"identifier_entries":[]},"links":{"outbound_url":"http://hdl.handle.net/2142/73103","outbound_label":"Handle","outbound_source":"dc:identifier"},"metadata_groups":[{"id":"people","label":"People","entries":[{"key":"dc:contributor","label":"Contributor","values":["Chen, Deming"]},{"key":"dc:creator","label":"Author","values":["Dhar, Ashutosh"]}]},{"id":"academic_context","label":"Academic Context","entries":[{"key":"dc:date","label":"Dc Date","values":["2015-01-21T19:59:31Z","2017-01-22T10:15:40Z","2014-12","2015-01-21"]},{"key":"dc:type","label":"Dc Type","values":["text"]},{"key":"thesis:degree_discipline","label":"Discipline","values":["Electrical & Computer Engr"]},{"key":"thesis:degree_level","label":"Degree Level","values":["Thesis"]},{"key":"thesis:degree_name","label":"Degree Name","values":["M.S."]},{"key":"thesis:institution_name","label":"Thesis Institution Name","values":["University of Illinois at Urbana-Champaign"]}]},{"id":"subjects_keywords","label":"Subjects and Keywords","entries":[{"key":"dc:subject","label":"Dc Subject","values":["Graphics Processing Unit (GPU)","General Purpose Graphics Processing Unit (GPGPU)","Reconfigurable Computing","Architecture","Compute Unified Device Architecture (CUDA)"]}]},{"id":"language_rights","label":"Language and Rights","entries":[{"key":"dc:language","label":"Dc Language","values":["en"]},{"key":"dc:rights","label":"Dc Rights","values":["Copyright 2014 Ashutosh Dhar"]}]},{"id":"identifiers","label":"Identifiers","entries":[{"key":"dc:identifier","label":"Identifier","values":["http://hdl.handle.net/2142/73103"]}]},{"id":"additional","label":"Additional Metadata","entries":[{"key":"dc:description","label":"Description","values":["General purpose graphics processing unit (GPU) computing (GPGPU) has emerged as a new paradigm for programmers to exploit massive amounts of parallelism for relatively low costs. The abundance of GPUs in desktop and mobile computing platforms makes them ideal for accelerating tasks on multiple devices. However, despite the massively parallel architecture, GPUs are limited by the applications that run on them. The generic architecture of a GPU allows it to accelerate a large variety of applications, but none of these applications are capable of exploiting the complete performance capabilities of the GPU. This underutilization results in wastage of resources and power. In this work, we propose to introduce reconfiguration to the GPU architecture in the hopes of being able to tune its architecture to maximize performance for a given application or redistribute resources so as to reduce power consumption.","Item withdrawn by Mark Zulauf (zulauf@illinois.edu) on 2014-12-11T14:31:05Z Item was in collections: University of Illinois Theses & Dissertations (ID: 1) No. of bitstreams: 1 Dhar_Ashutosh.pdf: 335169 bytes, checksum: 2337310aac958754ede3e93030cca2fc (MD5)","Made available in DSpace on 2015-01-21T19:59:31Z (GMT). No. of bitstreams: 1 Ashutosh_Dhar.pdf: 335169 bytes, checksum: 2337310aac958754ede3e93030cca2fc (MD5)","Embargo set by: Seth Robbins for item 73292 Lift date: 2017-01-21T19:59:39Z Reason: Author requested closed access (OA after 2yrs) in Vireo ETD system","Limited Restriction Lifted for Item 73292 on 2017-01-22T10:15:40Z."]},{"key":"dc:title","label":"Title","values":["The case for reconfigurable general purpose GPU computing"]}]}],"canonical_facts":{"dc:contributor":["Chen, Deming"],"dc:creator":["Dhar, Ashutosh"],"dc:date":["2015-01-21T19:59:31Z","2017-01-22T10:15:40Z","2014-12","2015-01-21"],"dc:description":["General purpose graphics processing unit (GPU) computing (GPGPU) has emerged as a new paradigm for programmers to exploit massive amounts of parallelism for relatively low costs. The abundance of GPUs in desktop and mobile computing platforms makes them ideal for accelerating tasks on multiple devices. However, despite the massively parallel architecture, GPUs are limited by the applications that run on them. The generic architecture of a GPU allows it to accelerate a large variety of applications, but none of these applications are capable of exploiting the complete performance capabilities of the GPU. This underutilization results in wastage of resources and power. In this work, we propose to introduce reconfiguration to the GPU architecture in the hopes of being able to tune its architecture to maximize performance for a given application or redistribute resources so as to reduce power consumption.","Item withdrawn by Mark Zulauf (zulauf@illinois.edu) on 2014-12-11T14:31:05Z Item was in collections: University of Illinois Theses & Dissertations (ID: 1) No. of bitstreams: 1 Dhar_Ashutosh.pdf: 335169 bytes, checksum: 2337310aac958754ede3e93030cca2fc (MD5)","Made available in DSpace on 2015-01-21T19:59:31Z (GMT). No. of bitstreams: 1 Ashutosh_Dhar.pdf: 335169 bytes, checksum: 2337310aac958754ede3e93030cca2fc (MD5)","Embargo set by: Seth Robbins for item 73292 Lift date: 2017-01-21T19:59:39Z Reason: Author requested closed access (OA after 2yrs) in Vireo ETD system","Limited Restriction Lifted for Item 73292 on 2017-01-22T10:15:40Z."],"dc:identifier":["http://hdl.handle.net/2142/73103"],"dc:language":["en"],"dc:rights":["Copyright 2014 Ashutosh Dhar"],"dc:subject":["Graphics Processing Unit (GPU)","General Purpose Graphics Processing Unit (GPGPU)","Reconfigurable Computing","Architecture","Compute Unified Device Architecture (CUDA)"],"dc:title":["The case for reconfigurable general purpose GPU computing"],"dc:type":["text"],"thesis:degree_discipline":["Electrical & Computer Engr"],"thesis:degree_level":["Thesis"],"thesis:degree_name":["M.S."],"thesis:institution_name":["University of Illinois at Urbana-Champaign"]},"updated_at":"2026-07-22T22:26:07Z"}